From 7846f59d0dcb36c13e06a3ba8a4c461e646582b6 Mon Sep 17 00:00:00 2001 From: Andreas Sandberg Date: Mon, 3 Jun 2013 13:55:41 +0200 Subject: arch: Create a method to finalize physical addresses in the TLB Some architectures (currently only x86) require some fixing-up of physical addresses after a normal address translation. This is usually to remap devices such as the APIC, but could be used for other memory mapped devices as well. When running the CPU in a using hardware virtualization, we still need to do these address fix-ups before inserting the request into the memory system. This patch moves this patch allows that code to be used by such CPUs without doing full address translations. --- src/arch/power/tlb.hh | 1 + 1 file changed, 1 insertion(+) (limited to 'src/arch/power/tlb.hh') diff --git a/src/arch/power/tlb.hh b/src/arch/power/tlb.hh index 3cf2a3706..753231a89 100644 --- a/src/arch/power/tlb.hh +++ b/src/arch/power/tlb.hh @@ -164,6 +164,7 @@ class TLB : public BaseTLB * supported by Checker at the moment */ Fault translateFunctional(RequestPtr req, ThreadContext *tc, Mode mode); + Fault finalizePhysical(RequestPtr req, ThreadContext *tc, Mode mode) const; // Checkpointing void serialize(std::ostream &os); -- cgit v1.2.3