From 5e8287d2e2eaf058495442ea9e32fafc343a0b53 Mon Sep 17 00:00:00 2001 From: Nathanael Premillieu Date: Wed, 5 Apr 2017 12:46:06 -0500 Subject: arch, cpu: Architectural Register structural indexing Replace the unified register mapping with a structure associating a class and an index. It is now much easier to know which class of register the index is referring to. Also, when adding a new class there is no need to modify existing ones. Change-Id: I55b3ac80763702aa2cd3ed2cbff0a75ef7620373 Reviewed-by: Andreas Sandberg [ Fix RISCV build issues ] Signed-off-by: Andreas Sandberg Reviewed-on: https://gem5-review.googlesource.com/2700 --- src/arch/power/insts/branch.cc | 2 +- src/arch/power/insts/static_inst.cc | 12 +++++------- src/arch/power/insts/static_inst.hh | 2 +- src/arch/power/registers.hh | 8 -------- 4 files changed, 7 insertions(+), 17 deletions(-) (limited to 'src/arch/power') diff --git a/src/arch/power/insts/branch.cc b/src/arch/power/insts/branch.cc index f9876db8c..f10e8453a 100644 --- a/src/arch/power/insts/branch.cc +++ b/src/arch/power/insts/branch.cc @@ -153,7 +153,7 @@ BranchNonPCRelCond::generateDisassembly(Addr pc, PowerISA::PCState BranchRegCond::branchTarget(ThreadContext *tc) const { - uint32_t regVal = tc->readIntReg(_srcRegIdx[_numSrcRegs - 1]); + uint32_t regVal = tc->readIntReg(_srcRegIdx[_numSrcRegs - 1].regIdx); return regVal & 0xfffffffc; } diff --git a/src/arch/power/insts/static_inst.cc b/src/arch/power/insts/static_inst.cc index db8c03002..210205db2 100644 --- a/src/arch/power/insts/static_inst.cc +++ b/src/arch/power/insts/static_inst.cc @@ -36,19 +36,17 @@ using namespace PowerISA; void -PowerStaticInst::printReg(std::ostream &os, int reg) const +PowerStaticInst::printReg(std::ostream &os, RegId reg) const { - RegIndex rel_reg; - - switch (regIdxToClass(reg, &rel_reg)) { + switch (reg.regClass) { case IntRegClass: - ccprintf(os, "r%d", rel_reg); + ccprintf(os, "r%d", reg.regIdx); break; case FloatRegClass: - ccprintf(os, "f%d", rel_reg); + ccprintf(os, "f%d", reg.regIdx); break; case MiscRegClass: - switch (rel_reg) { + switch (reg.regIdx) { case 0: ccprintf(os, "cr"); break; case 1: ccprintf(os, "xer"); break; case 2: ccprintf(os, "lr"); break; diff --git a/src/arch/power/insts/static_inst.hh b/src/arch/power/insts/static_inst.hh index 48e5fa94b..b7a818a2c 100644 --- a/src/arch/power/insts/static_inst.hh +++ b/src/arch/power/insts/static_inst.hh @@ -59,7 +59,7 @@ class PowerStaticInst : public StaticInst /// Print a register name for disassembly given the unique /// dependence tag number (FP or int). void - printReg(std::ostream &os, int reg) const; + printReg(std::ostream &os, RegId reg) const; std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; diff --git a/src/arch/power/registers.hh b/src/arch/power/registers.hh index abee516fc..742809db1 100644 --- a/src/arch/power/registers.hh +++ b/src/arch/power/registers.hh @@ -43,8 +43,6 @@ using PowerISAInst::MaxInstDestRegs; // be detected by it. Manually add it here. const int MaxMiscDestRegs = PowerISAInst::MaxMiscDestRegs + 1; -typedef uint8_t RegIndex; - typedef uint64_t IntReg; // Floating point register file entry type @@ -87,12 +85,6 @@ const int SyscallNumReg = 0; const int SyscallPseudoReturnReg = 3; const int SyscallSuccessReg = 3; -// These help enumerate all the registers for dependence tracking. -const int FP_Reg_Base = NumIntRegs; -const int CC_Reg_Base = FP_Reg_Base + NumFloatRegs; -const int Misc_Reg_Base = CC_Reg_Base + NumCCRegs; // NumCCRegs == 0 -const int Max_Reg_Index = Misc_Reg_Base + NumMiscRegs; - typedef union { IntReg intreg; FloatReg fpreg; -- cgit v1.2.3