From 7aa423acad07f05ee547117406a72a5c1b4f6015 Mon Sep 17 00:00:00 2001 From: Steve Reinhardt Date: Tue, 15 Oct 2013 14:22:42 -0400 Subject: cpu: clean up architectural register classification Move from a poorly documented scheme where the mapping of unified architectural register indices to register classes is hardcoded all over to one where there's an enum for the register classes and a function that encapsulates the mapping. --- src/arch/power/insts/static_inst.cc | 30 +++++++++++++++++++----------- 1 file changed, 19 insertions(+), 11 deletions(-) (limited to 'src/arch/power') diff --git a/src/arch/power/insts/static_inst.cc b/src/arch/power/insts/static_inst.cc index 1982744bf..09b662453 100644 --- a/src/arch/power/insts/static_inst.cc +++ b/src/arch/power/insts/static_inst.cc @@ -1,5 +1,6 @@ /* * Copyright (c) 2009 The University of Edinburgh + * Copyright (c) 2013 Advanced Micro Devices, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -29,23 +30,30 @@ */ #include "arch/power/insts/static_inst.hh" +#include "cpu/reg_class.hh" using namespace PowerISA; void PowerStaticInst::printReg(std::ostream &os, int reg) const { - if (reg < FP_Base_DepTag) { - ccprintf(os, "r%d", reg); - } else if (reg < Ctrl_Base_DepTag) { - ccprintf(os, "f%d", reg - FP_Base_DepTag); - } else { - switch (reg - Ctrl_Base_DepTag) { - case 0: ccprintf(os, "cr"); break; - case 1: ccprintf(os, "xer"); break; - case 2: ccprintf(os, "lr"); break; - case 3: ccprintf(os, "ctr"); break; - default: ccprintf(os, "unknown_reg"); + RegIndex rel_reg; + + switch (regIdxToClass(reg, &rel_reg)) { + case IntRegClass: + ccprintf(os, "r%d", rel_reg); + break; + case FloatRegClass: + ccprintf(os, "f%d", rel_reg); + break; + case MiscRegClass: + switch (rel_reg) { + case 0: ccprintf(os, "cr"); break; + case 1: ccprintf(os, "xer"); break; + case 2: ccprintf(os, "lr"); break; + case 3: ccprintf(os, "ctr"); break; + default: ccprintf(os, "unknown_reg"); + break; } } } -- cgit v1.2.3