From a473b5a6eb269cc303ecfb5e5643d891a5d255d9 Mon Sep 17 00:00:00 2001 From: Rekai Gonzalez-Alberquilla Date: Wed, 5 Apr 2017 13:14:34 -0500 Subject: cpu: Simplify the rename interface and use RegId With the hierarchical RegId there are a lot of functions that are redundant now. The idea behind the simplification is that instead of having the regId, telling which kind of register read/write/rename/lookup/etc. and then the function panic_if'ing if the regId is not of the appropriate type, we provide an interface that decides what kind of register to read depending on the register type of the given regId. Change-Id: I7d52e9e21fc01205ae365d86921a4ceb67a57178 Reviewed-by: Andreas Sandberg [ Fix RISCV build issues ] Signed-off-by: Andreas Sandberg Reviewed-on: https://gem5-review.googlesource.com/2702 --- src/arch/riscv/isa/formats/type.isa | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/arch/riscv/isa/formats/type.isa') diff --git a/src/arch/riscv/isa/formats/type.isa b/src/arch/riscv/isa/formats/type.isa index 0f2ffe9c4..f6a563699 100644 --- a/src/arch/riscv/isa/formats/type.isa +++ b/src/arch/riscv/isa/formats/type.isa @@ -210,7 +210,7 @@ output decoder {{ Jump::branchTarget(ThreadContext *tc) const { PCState pc = tc->pcState(); - IntReg Rs1 = tc->readIntReg(_srcRegIdx[0].regIdx); + IntReg Rs1 = tc->readIntReg(_srcRegIdx[0].index()); pc.set((Rs1 + imm)&~0x1); return pc; } -- cgit v1.2.3