From 7e6a35374a944b67868d92ce85b427ea9103ca53 Mon Sep 17 00:00:00 2001 From: Alec Roelke Date: Wed, 14 Jun 2017 17:33:29 -0400 Subject: arch-riscv: Add support for compressed extension RV64C This patch adds compatibility with the 64-bit compressed extension to the RISC-V ISA, RV64C. Current versions of the toolchain may use compressed instructions in glibc by default, which can only be overridden by recompiling the entire toolchain (simply adding "-march=rv64g" or "-march=rv64imafd" when compiling a binary is not sufficient to use uncompressed instructions in glibc functions in the binary). [Update diassembly generation for new RegId type.] [Rebase onto master.] Change-Id: Ifd5a5ea746704ce7e1b111442c3eb84c509a98b4 Reviewed-on: https://gem5-review.googlesource.com/3860 Reviewed-by: Alec Roelke Maintainer: Alec Roelke --- src/arch/riscv/isa/includes.isa | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/arch/riscv/isa/includes.isa') diff --git a/src/arch/riscv/isa/includes.isa b/src/arch/riscv/isa/includes.isa index 443db6786..82d1794fd 100644 --- a/src/arch/riscv/isa/includes.isa +++ b/src/arch/riscv/isa/includes.isa @@ -65,6 +65,7 @@ output decoder {{ #include "sim/full_system.hh" using namespace RiscvISA; +using namespace std; }}; output exec {{ @@ -90,4 +91,5 @@ output exec {{ #include "sim/system.hh" using namespace RiscvISA; +using namespace std; }}; -- cgit v1.2.3