From dc1c9e03007f084caabc995b41616603e0a004dc Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Tue, 8 May 2007 13:02:19 +0000 Subject: Add a hack to truncate addresses to 32 bits in SE. Paging should be changed to use the architecture's TLB, at which point this can be removed. --HG-- extra : convert_revision : 54f3c18e5aead727d0ac244ed00fd97d3ca8ad75 --- src/arch/sparc/isa/formats/mem/basicmem.isa | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'src/arch/sparc/isa/formats/mem/basicmem.isa') diff --git a/src/arch/sparc/isa/formats/mem/basicmem.isa b/src/arch/sparc/isa/formats/mem/basicmem.isa index 2f62c7bef..aa6c4cdea 100644 --- a/src/arch/sparc/isa/formats/mem/basicmem.isa +++ b/src/arch/sparc/isa/formats/mem/basicmem.isa @@ -57,10 +57,12 @@ let {{ addrCalcImm = 'EA = Rs1 + imm;' iop = InstObjParams(name, Name, 'Mem', {"code": code, "postacc_code" : postacc_code, - "fault_check": faultCode, "ea_code": addrCalcReg}, opt_flags) + "fault_check": faultCode, "ea_code": addrCalcReg, + "EA_trunc": TruncateEA}, opt_flags) iop_imm = InstObjParams(name, Name + "Imm", 'MemImm', {"code": code, "postacc_code" : postacc_code, - "fault_check": faultCode, "ea_code": addrCalcImm}, opt_flags) + "fault_check": faultCode, "ea_code": addrCalcImm, + "EA_trunc": TruncateEA}, opt_flags) header_output = MemDeclare.subst(iop) + MemDeclare.subst(iop_imm) decoder_output = BasicConstructor.subst(iop) + BasicConstructor.subst(iop_imm) decode_block = ROrImmDecode.subst(iop) -- cgit v1.2.3