From 2939d7d061efc8444c06ac52f82c8aeaf0048aaf Mon Sep 17 00:00:00 2001
From: Ali Saidi <saidi@eecs.umich.edu>
Date: Fri, 26 Jan 2007 18:57:16 -0500
Subject: Make Sparc traceflag even more chatty some fixes to fp instructions
 to use the single precision registers if this is an fp op emit fp check code
 add fpregs to m5legion struct

src/arch/sparc/floatregfile.cc:
    Make Sparc traceflag even more chatty
src/arch/sparc/isa/base.isa:
    add code to check if the fpu is enabled
src/arch/sparc/isa/decoder.isa:
    some fixes to fp instructions to use the single precision registers
    fix smul again
    fix subc/subcc/subccc condition code setting
src/arch/sparc/isa/formats/basic.isa:
src/arch/sparc/isa/formats/mem/util.isa:
    if this is an fp op emit fp check code
src/cpu/exetrace.cc:
    check fp regs as well as int regs
src/cpu/m5legion_interface.h:
    add fpregs to m5legion struct

--HG--
extra : convert_revision : e7d26d10fb8ce88f96e3a51f84b48c3b3ad2f232
---
 src/arch/sparc/isa/formats/basic.isa    | 3 ++-
 src/arch/sparc/isa/formats/mem/util.isa | 6 +++++-
 2 files changed, 7 insertions(+), 2 deletions(-)

(limited to 'src/arch/sparc/isa/formats')

diff --git a/src/arch/sparc/isa/formats/basic.isa b/src/arch/sparc/isa/formats/basic.isa
index a4c05387b..db6efd229 100644
--- a/src/arch/sparc/isa/formats/basic.isa
+++ b/src/arch/sparc/isa/formats/basic.isa
@@ -1,4 +1,4 @@
-// Copyright (c) 2006 The Regents of The University of Michigan
+// Copyright (c) 2006-2007 The Regents of The University of Michigan
 // All rights reserved.
 //
 // Redistribution and use in source and binary forms, with or without
@@ -71,6 +71,7 @@ def template BasicExecute {{
         {
             Fault fault = NoFault;
 
+            %(fp_enable_check)s;
             %(op_decl)s;
             %(op_rd)s;
             %(code)s;
diff --git a/src/arch/sparc/isa/formats/mem/util.isa b/src/arch/sparc/isa/formats/mem/util.isa
index b6e0945b7..3b02f58de 100644
--- a/src/arch/sparc/isa/formats/mem/util.isa
+++ b/src/arch/sparc/isa/formats/mem/util.isa
@@ -1,4 +1,4 @@
-// Copyright (c) 2006 The Regents of The University of Michigan
+// Copyright (c) 2006-2007 The Regents of The University of Michigan
 // All rights reserved.
 //
 // Redistribution and use in source and binary forms, with or without
@@ -141,6 +141,7 @@ def template LoadExecute {{
         {
             Fault fault = NoFault;
             Addr EA;
+            %(fp_enable_check)s;
             %(op_decl)s;
             %(op_rd)s;
             %(ea_code)s;
@@ -169,6 +170,7 @@ def template LoadExecute {{
             Fault fault = NoFault;
             Addr EA;
             uint%(mem_acc_size)s_t Mem;
+            %(fp_enable_check)s;
             %(ea_decl)s;
             %(ea_rd)s;
             %(ea_code)s;
@@ -206,6 +208,7 @@ def template StoreExecute {{
             //It should be optomized out in all the others
             bool storeCond = true;
             Addr EA;
+            %(fp_enable_check)s;
             %(op_decl)s;
             %(op_rd)s;
             %(ea_code)s;
@@ -235,6 +238,7 @@ def template StoreExecute {{
             Fault fault = NoFault;
             bool storeCond = true;
             Addr EA;
+            %(fp_enable_check)s;
             %(op_decl)s;
             %(op_rd)s;
             %(ea_code)s;
-- 
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