From 20208d00e6566a7946e589184a7ed9dffb54fc74 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Mon, 23 Oct 2006 07:55:52 -0400 Subject: Broke Load/Store instructions into microcode, and partially refactored memory operations in the SPARC ISA description. --HG-- rename : src/arch/sparc/isa/formats.isa => src/arch/sparc/isa/formats/formats.isa rename : src/arch/sparc/isa/formats/mem.isa => src/arch/sparc/isa/formats/mem/basicmem.isa rename : src/arch/sparc/isa/formats/blockmem.isa => src/arch/sparc/isa/formats/mem/blockmem.isa rename : src/arch/sparc/isa/formats/mem.isa => src/arch/sparc/isa/formats/mem/mem.isa extra : convert_revision : dbbb00f997a102871b084b209b9fa08c5e1853ee --- src/arch/sparc/isa/includes.isa | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/arch/sparc/isa/includes.isa') diff --git a/src/arch/sparc/isa/includes.isa b/src/arch/sparc/isa/includes.isa index 9fed36b03..a324756ec 100644 --- a/src/arch/sparc/isa/includes.isa +++ b/src/arch/sparc/isa/includes.isa @@ -49,6 +49,7 @@ output decoder {{ #include "base/cprintf.hh" #include "base/loader/symtab.hh" #include "cpu/thread_context.hh" // for Jump::branchTarget() +#include "mem/packet.hh" #if defined(linux) #include @@ -66,6 +67,8 @@ output exec {{ #include "cpu/base.hh" #include "cpu/exetrace.hh" #include "sim/sim_exit.hh" +#include "mem/packet.hh" +#include "mem/packet_access.hh" using namespace SparcISA; }}; -- cgit v1.2.3