From 83f2da1ca84e21c1ca0855ffc24b1d8c48fed2c8 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Mon, 6 Nov 2017 23:30:42 -0800 Subject: sparc: Move integer StaticInst base classes out of the ISA desc. Change-Id: I24008c1e2a94ad8dc4cc13739214928eb846a496 Reviewed-on: https://gem5-review.googlesource.com/5483 Reviewed-by: Gabe Black Maintainer: Gabe Black --- src/arch/sparc/isa/formats/integerop.isa | 194 ------------------------------- src/arch/sparc/isa/includes.isa | 1 + 2 files changed, 1 insertion(+), 194 deletions(-) (limited to 'src/arch/sparc/isa') diff --git a/src/arch/sparc/isa/formats/integerop.isa b/src/arch/sparc/isa/formats/integerop.isa index 93e5614af..fa7af31f8 100644 --- a/src/arch/sparc/isa/formats/integerop.isa +++ b/src/arch/sparc/isa/formats/integerop.isa @@ -33,113 +33,6 @@ // Integer operate instructions // -output header {{ - /** - * Base class for integer operations. - */ - class IntOp : public SparcStaticInst - { - protected: - // Constructor - IntOp(const char *mnem, ExtMachInst _machInst, - OpClass __opClass) : - SparcStaticInst(mnem, _machInst, __opClass) - { - } - - std::string generateDisassembly(Addr pc, - const SymbolTable *symtab) const; - - virtual bool printPseudoOps(std::ostream &os, Addr pc, - const SymbolTable *symtab) const; - }; - - /** - * Base class for immediate integer operations. - */ - class IntOpImm : public IntOp - { - protected: - // Constructor - IntOpImm(const char *mnem, ExtMachInst _machInst, - OpClass __opClass) : - IntOp(mnem, _machInst, __opClass) - { - } - - int64_t imm; - - std::string generateDisassembly(Addr pc, - const SymbolTable *symtab) const; - - virtual bool printPseudoOps(std::ostream &os, Addr pc, - const SymbolTable *symtab) const; - }; - - /** - * Base class for 10 bit immediate integer operations. - */ - class IntOpImm10 : public IntOpImm - { - protected: - // Constructor - IntOpImm10(const char *mnem, ExtMachInst _machInst, - OpClass __opClass) : - IntOpImm(mnem, _machInst, __opClass) - { - imm = sext<10>(SIMM10); - } - }; - - /** - * Base class for 11 bit immediate integer operations. - */ - class IntOpImm11 : public IntOpImm - { - protected: - // Constructor - IntOpImm11(const char *mnem, ExtMachInst _machInst, - OpClass __opClass) : - IntOpImm(mnem, _machInst, __opClass) - { - imm = sext<11>(SIMM11); - } - }; - - /** - * Base class for 13 bit immediate integer operations. - */ - class IntOpImm13 : public IntOpImm - { - protected: - // Constructor - IntOpImm13(const char *mnem, ExtMachInst _machInst, - OpClass __opClass) : - IntOpImm(mnem, _machInst, __opClass) - { - imm = sext<13>(SIMM13); - } - }; - - /** - * Base class for sethi. - */ - class SetHi : public IntOpImm - { - protected: - // Constructor - SetHi(const char *mnem, ExtMachInst _machInst, - OpClass __opClass) : - IntOpImm(mnem, _machInst, __opClass) - { - imm = (IMM22 & 0x3FFFFF) << 10; - } - - std::string generateDisassembly(Addr pc, - const SymbolTable *symtab) const; - }; -}}; - def template SetHiDecode {{ { if (RD == 0 && IMM22 == 0) @@ -149,93 +42,6 @@ def template SetHiDecode {{ } }}; -output decoder {{ - - bool - IntOp::printPseudoOps(std::ostream &os, Addr pc, - const SymbolTable *symbab) const - { - if (!std::strcmp(mnemonic, "or") && _srcRegIdx[0].index() == 0) { - printMnemonic(os, "mov"); - printSrcReg(os, 1); - ccprintf(os, ", "); - printDestReg(os, 0); - return true; - } - return false; - } - - bool - IntOpImm::printPseudoOps(std::ostream &os, Addr pc, - const SymbolTable *symbab) const - { - if (!std::strcmp(mnemonic, "or")) { - if (_numSrcRegs > 0 && _srcRegIdx[0].index() == 0) { - if (imm == 0) { - printMnemonic(os, "clr"); - } else { - printMnemonic(os, "mov"); - ccprintf(os, " 0x%x, ", imm); - } - printDestReg(os, 0); - return true; - } else if (imm == 0) { - printMnemonic(os, "mov"); - printSrcReg(os, 0); - ccprintf(os, ", "); - printDestReg(os, 0); - return true; - } - } - return false; - } - - std::string - IntOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const - { - std::stringstream response; - - if (printPseudoOps(response, pc, symtab)) - return response.str(); - printMnemonic(response, mnemonic); - printRegArray(response, _srcRegIdx, _numSrcRegs); - if (_numDestRegs && _numSrcRegs) - response << ", "; - printDestReg(response, 0); - return response.str(); - } - - std::string - IntOpImm::generateDisassembly(Addr pc, - const SymbolTable *symtab) const - { - std::stringstream response; - - if (printPseudoOps(response, pc, symtab)) - return response.str(); - printMnemonic(response, mnemonic); - printRegArray(response, _srcRegIdx, _numSrcRegs); - if (_numSrcRegs > 0) - response << ", "; - ccprintf(response, "0x%x", imm); - if (_numDestRegs > 0) - response << ", "; - printDestReg(response, 0); - return response.str(); - } - - std::string - SetHi::generateDisassembly(Addr pc, const SymbolTable *symtab) const - { - std::stringstream response; - - printMnemonic(response, mnemonic); - ccprintf(response, "%%hi(0x%x), ", imm); - printDestReg(response, 0); - return response.str(); - } -}}; - def template IntOpExecute {{ Fault %(class_name)s::execute(ExecContext *xc, Trace::InstRecord *traceData) const diff --git a/src/arch/sparc/isa/includes.isa b/src/arch/sparc/isa/includes.isa index 49edccb0b..e78295a0d 100644 --- a/src/arch/sparc/isa/includes.isa +++ b/src/arch/sparc/isa/includes.isa @@ -41,6 +41,7 @@ output header {{ #include "arch/sparc/faults.hh" #include "arch/sparc/insts/blockmem.hh" #include "arch/sparc/insts/branch.hh" +#include "arch/sparc/insts/integer.hh" #include "arch/sparc/insts/mem.hh" #include "arch/sparc/insts/micro.hh" #include "arch/sparc/insts/nop.hh" -- cgit v1.2.3