From a3d3eb0ff777e0580aa30f52f31958a090cbe3af Mon Sep 17 00:00:00 2001
From: Andreas Sandberg <Andreas.Sandberg@ARM.com>
Date: Tue, 26 Aug 2014 10:13:23 -0400
Subject: sparc: Fixup bit ordering in the PSTATE bit union

The order of the MSB and LSB bit of the mm field in the PSTATE union
is wrong. Any access to this field will currently be ignored and reads
will always return zero. This patch fixes the ordering so it is <MSB,
LSB> instead of <LSB, MSB>.
---
 src/arch/sparc/miscregs.hh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/arch/sparc/miscregs.hh')

diff --git a/src/arch/sparc/miscregs.hh b/src/arch/sparc/miscregs.hh
index b55fb7d44..6c5118f8a 100644
--- a/src/arch/sparc/miscregs.hh
+++ b/src/arch/sparc/miscregs.hh
@@ -129,7 +129,7 @@ BitUnion16(PSTATE)
     Bitfield<2> priv;
     Bitfield<3> am;
     Bitfield<4> pef;
-    Bitfield<6, 7> mm;
+    Bitfield<7, 6> mm;
     Bitfield<8> tle;
     Bitfield<9> cle;
     Bitfield<10> pid0;
-- 
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