From 1ab1500dfd0cb64b2fef7fb5e0f9e1fa007d2481 Mon Sep 17 00:00:00 2001
From: Gabe Black <gabeblack@google.com>
Date: Thu, 18 Oct 2018 17:50:42 -0700
Subject: sparc: Get rid of some register type definitions.

These are IntReg, FloatReg, FloatRegBits, and MiscReg. These have been
supplanted by the global types RegVal and FloatRegVal.

Change-Id: I956abfc7b439b083403e1a0d01e0bb35020bde44
Reviewed-on: https://gem5-review.googlesource.com/c/13627
Maintainer: Gabe Black <gabeblack@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
---
 src/arch/sparc/process.cc | 40 ++++++++++++++++++++--------------------
 1 file changed, 20 insertions(+), 20 deletions(-)

(limited to 'src/arch/sparc/process.cc')

diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc
index 7dda6ed21..6659a04fa 100644
--- a/src/arch/sparc/process.cc
+++ b/src/arch/sparc/process.cc
@@ -183,7 +183,7 @@ Sparc64Process::initState()
     pstate.ie = 1;
     tc->setMiscReg(MISCREG_PSTATE, pstate);
 
-    argsInit(sizeof(IntReg), PageBytes);
+    argsInit(sizeof(RegVal), PageBytes);
 }
 
 template<class IntType>
@@ -441,11 +441,11 @@ Sparc32Process::argsInit(int intSize, int pageSize)
 
 void Sparc32Process::flushWindows(ThreadContext *tc)
 {
-    IntReg Cansave = tc->readIntReg(NumIntArchRegs + 3);
-    IntReg Canrestore = tc->readIntReg(NumIntArchRegs + 4);
-    IntReg Otherwin = tc->readIntReg(NumIntArchRegs + 6);
-    MiscReg CWP = tc->readMiscReg(MISCREG_CWP);
-    MiscReg origCWP = CWP;
+    RegVal Cansave = tc->readIntReg(NumIntArchRegs + 3);
+    RegVal Canrestore = tc->readIntReg(NumIntArchRegs + 4);
+    RegVal Otherwin = tc->readIntReg(NumIntArchRegs + 6);
+    RegVal CWP = tc->readMiscReg(MISCREG_CWP);
+    RegVal origCWP = CWP;
     CWP = (CWP + Cansave + 2) % NWindows;
     while (NWindows - 2 - Cansave != 0) {
         if (Otherwin) {
@@ -453,7 +453,7 @@ void Sparc32Process::flushWindows(ThreadContext *tc)
         } else {
             tc->setMiscReg(MISCREG_CWP, CWP);
             // Do the stores
-            IntReg sp = tc->readIntReg(StackPointerReg);
+            RegVal sp = tc->readIntReg(StackPointerReg);
             for (int index = 16; index < 32; index++) {
                 uint32_t regVal = tc->readIntReg(index);
                 regVal = htog(regVal);
@@ -476,11 +476,11 @@ void Sparc32Process::flushWindows(ThreadContext *tc)
 void
 Sparc64Process::flushWindows(ThreadContext *tc)
 {
-    IntReg Cansave = tc->readIntReg(NumIntArchRegs + 3);
-    IntReg Canrestore = tc->readIntReg(NumIntArchRegs + 4);
-    IntReg Otherwin = tc->readIntReg(NumIntArchRegs + 6);
-    MiscReg CWP = tc->readMiscReg(MISCREG_CWP);
-    MiscReg origCWP = CWP;
+    RegVal Cansave = tc->readIntReg(NumIntArchRegs + 3);
+    RegVal Canrestore = tc->readIntReg(NumIntArchRegs + 4);
+    RegVal Otherwin = tc->readIntReg(NumIntArchRegs + 6);
+    RegVal CWP = tc->readMiscReg(MISCREG_CWP);
+    RegVal origCWP = CWP;
     CWP = (CWP + Cansave + 2) % NWindows;
     while (NWindows - 2 - Cansave != 0) {
         if (Otherwin) {
@@ -488,9 +488,9 @@ Sparc64Process::flushWindows(ThreadContext *tc)
         } else {
             tc->setMiscReg(MISCREG_CWP, CWP);
             // Do the stores
-            IntReg sp = tc->readIntReg(StackPointerReg);
+            RegVal sp = tc->readIntReg(StackPointerReg);
             for (int index = 16; index < 32; index++) {
-                IntReg regVal = tc->readIntReg(index);
+                RegVal regVal = tc->readIntReg(index);
                 regVal = htog(regVal);
                 if (!tc->getMemProxy().tryWriteBlob(
                         sp + 2047 + (index - 16) * 8, (uint8_t *)&regVal, 8)) {
@@ -508,7 +508,7 @@ Sparc64Process::flushWindows(ThreadContext *tc)
     tc->setMiscReg(MISCREG_CWP, origCWP);
 }
 
-IntReg
+RegVal
 Sparc32Process::getSyscallArg(ThreadContext *tc, int &i)
 {
     assert(i < 6);
@@ -516,13 +516,13 @@ Sparc32Process::getSyscallArg(ThreadContext *tc, int &i)
 }
 
 void
-Sparc32Process::setSyscallArg(ThreadContext *tc, int i, IntReg val)
+Sparc32Process::setSyscallArg(ThreadContext *tc, int i, RegVal val)
 {
     assert(i < 6);
     tc->setIntReg(FirstArgumentReg + i, bits(val, 31, 0));
 }
 
-IntReg
+RegVal
 Sparc64Process::getSyscallArg(ThreadContext *tc, int &i)
 {
     assert(i < 6);
@@ -530,7 +530,7 @@ Sparc64Process::getSyscallArg(ThreadContext *tc, int &i)
 }
 
 void
-Sparc64Process::setSyscallArg(ThreadContext *tc, int i, IntReg val)
+Sparc64Process::setSyscallArg(ThreadContext *tc, int i, RegVal val)
 {
     assert(i < 6);
     tc->setIntReg(FirstArgumentReg + i, val);
@@ -547,7 +547,7 @@ SparcProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret)
         // no error, clear XCC.C
         tc->setIntReg(NumIntArchRegs + 2,
                       tc->readIntReg(NumIntArchRegs + 2) & 0xEE);
-        IntReg val = sysret.returnValue();
+        RegVal val = sysret.returnValue();
         if (pstate.am)
             val = bits(val, 31, 0);
         tc->setIntReg(ReturnValueReg, val);
@@ -555,7 +555,7 @@ SparcProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret)
         // got an error, set XCC.C
         tc->setIntReg(NumIntArchRegs + 2,
                       tc->readIntReg(NumIntArchRegs + 2) | 0x11);
-        IntReg val = sysret.errnoValue();
+        RegVal val = sysret.errnoValue();
         if (pstate.am)
             val = bits(val, 31, 0);
         tc->setIntReg(ReturnValueReg, val);
-- 
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