From 1ab1500dfd0cb64b2fef7fb5e0f9e1fa007d2481 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Thu, 18 Oct 2018 17:50:42 -0700 Subject: sparc: Get rid of some register type definitions. These are IntReg, FloatReg, FloatRegBits, and MiscReg. These have been supplanted by the global types RegVal and FloatRegVal. Change-Id: I956abfc7b439b083403e1a0d01e0bb35020bde44 Reviewed-on: https://gem5-review.googlesource.com/c/13627 Maintainer: Gabe Black Reviewed-by: Jason Lowe-Power --- src/arch/sparc/ua2005.cc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/arch/sparc/ua2005.cc') diff --git a/src/arch/sparc/ua2005.cc b/src/arch/sparc/ua2005.cc index 1a248d342..4cafff47c 100644 --- a/src/arch/sparc/ua2005.cc +++ b/src/arch/sparc/ua2005.cc @@ -88,7 +88,7 @@ getMiscRegName(RegIndex index) } void -ISA::setFSReg(int miscReg, MiscReg val, ThreadContext *tc) +ISA::setFSReg(int miscReg, RegVal val, ThreadContext *tc) { BaseCPU *cpu = tc->getCpuPtr(); @@ -242,7 +242,7 @@ ISA::setFSReg(int miscReg, MiscReg val, ThreadContext *tc) } } -MiscReg +RegVal ISA::readFSReg(int miscReg, ThreadContext * tc) { uint64_t temp; -- cgit v1.2.3