From 4a8078192d77f60580a79762156124e6331ea310 Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Fri, 5 Jan 2007 15:04:17 -0500 Subject: set the softint appropriately on an timer compare interrupt there is no interrupt_level_0 interrupt, so start the list at 0x40 so the adding is done correctly src/arch/sparc/faults.cc: there is no interrupt_level_0 interrupt, so start the list at 0x40 so the adding is done correctly src/arch/sparc/faults.hh: correct protection defines src/arch/sparc/ua2005.cc: set the softint appropriately on an timer compare interrupt --HG-- extra : convert_revision : f41c10ec78db973b3f856c70b58a17f83b60bbe2 --- src/arch/sparc/ua2005.cc | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'src/arch/sparc/ua2005.cc') diff --git a/src/arch/sparc/ua2005.cc b/src/arch/sparc/ua2005.cc index 66d699fce..c7d2ffce5 100644 --- a/src/arch/sparc/ua2005.cc +++ b/src/arch/sparc/ua2005.cc @@ -73,7 +73,7 @@ MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val, setReg(miscReg, val); if ((stick_cmpr & ~mask(63)) && sTickCompare->scheduled()) sTickCompare->deschedule(); - time = ((int64_t)(stick_cmpr & mask(63)) + (int64_t)stick) - + time = ((int64_t)(stick_cmpr & mask(63)) - (int64_t)stick) - tc->getCpuPtr()->instCount(); if (!(stick_cmpr & ~mask(63)) && time > 0) sTickCompare->schedule(time * tc->getCpuPtr()->cycles(1) + curTick); @@ -197,14 +197,15 @@ MiscRegFile::processSTickCompare(ThreadContext *tc) // we're actually at the correct cycle or we need to wait a little while // more int ticks; - ticks = (stick_cmpr & mask(63)) - tc->getCpuPtr()->instCount(); + ticks = ((int64_t)(stick_cmpr & mask(63)) - (int64_t)stick) - + tc->getCpuPtr()->instCount(); assert(ticks >= 0 && "stick compare missed interrupt cycle"); if (ticks == 0) { DPRINTF(Timer, "STick compare cycle reached at %#x\n", (stick_cmpr & mask(63))); tc->getCpuPtr()->checkInterrupts = true; - + softint |= ULL(1) << 16; } else sTickCompare->schedule(ticks * tc->getCpuPtr()->cycles(1) + curTick); } -- cgit v1.2.3