From 5b557a314f4dbde6f029b3f75c211332ac360f3a Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Sat, 11 Feb 2012 14:16:38 -0800 Subject: SPARC: Make PSTATE and HPSTATE a BitUnion. This gets rid of cryptic bits of code with lots of bit manipulation, and makes some comments redundant. --- src/arch/sparc/ua2005.cc | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) (limited to 'src/arch/sparc/ua2005.cc') diff --git a/src/arch/sparc/ua2005.cc b/src/arch/sparc/ua2005.cc index e6ab64de9..5948e0713 100644 --- a/src/arch/sparc/ua2005.cc +++ b/src/arch/sparc/ua2005.cc @@ -206,13 +206,18 @@ ISA::setFSReg(int miscReg, const MiscReg &val, ThreadContext *tc) break; case MISCREG_HPSTATE: - // T1000 spec says impl. dependent val must always be 1 - setMiscRegNoEffect(miscReg, val | HPSTATE::id); - if (hpstate & HPSTATE::tlz && tl == 0 && !(hpstate & HPSTATE::hpriv)) - cpu->postInterrupt(IT_TRAP_LEVEL_ZERO, 0); - else - cpu->clearInterrupt(IT_TRAP_LEVEL_ZERO, 0); - break; + { + HPSTATE newVal = val; + newVal.id = 1; + // T1000 spec says impl. dependent val must always be 1 + setMiscRegNoEffect(miscReg, newVal); + newVal = hpstate; + if (newVal.tlz && tl == 0 && !newVal.hpriv) + cpu->postInterrupt(IT_TRAP_LEVEL_ZERO, 0); + else + cpu->clearInterrupt(IT_TRAP_LEVEL_ZERO, 0); + break; + } case MISCREG_HTSTATE: setMiscRegNoEffect(miscReg, val); break; -- cgit v1.2.3