From 4b2e5ebeada762e88ad97397b8db3ebf4658b70f Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Thu, 13 Oct 2011 01:37:19 -0700
Subject: SPARC: Remove the last checks of FULL_SYSTEM.

---
 src/arch/sparc/tlb.cc | 29 +++++++++++++++--------------
 src/arch/sparc/tlb.hh |  1 -
 2 files changed, 15 insertions(+), 15 deletions(-)

(limited to 'src/arch/sparc')

diff --git a/src/arch/sparc/tlb.cc b/src/arch/sparc/tlb.cc
index 6e390143b..a6179e0f8 100644
--- a/src/arch/sparc/tlb.cc
+++ b/src/arch/sparc/tlb.cc
@@ -42,6 +42,7 @@
 #include "debug/TLB.hh"
 #include "mem/packet_access.hh"
 #include "mem/request.hh"
+#include "sim/full_system.hh"
 #include "sim/system.hh"
 
 /* @todo remove some of the magic constants.  -- ali
@@ -497,14 +498,14 @@ TLB::translateInst(RequestPtr req, ThreadContext *tc)
 
     if (e == NULL || !e->valid) {
         writeTagAccess(vaddr, context);
-        if (real)
+        if (real) {
             return new InstructionRealTranslationMiss;
-        else
-#if FULL_SYSTEM
-            return new FastInstructionAccessMMUMiss;
-#else
-            return new FastInstructionAccessMMUMiss(req->getVaddr());
-#endif
+        } else {
+            if (FullSystem)
+                return new FastInstructionAccessMMUMiss;
+            else
+                return new FastInstructionAccessMMUMiss(req->getVaddr());
+        }
     }
 
     // were not priviledged accesing priv page
@@ -709,14 +710,14 @@ TLB::translateData(RequestPtr req, ThreadContext *tc, bool write)
     if (e == NULL || !e->valid) {
         writeTagAccess(vaddr, context);
         DPRINTF(TLB, "TLB: DTB Failed to find matching TLB entry\n");
-        if (real)
+        if (real) {
             return new DataRealTranslationMiss;
-        else
-#if FULL_SYSTEM
-            return new FastDataAccessMMUMiss;
-#else
-            return new FastDataAccessMMUMiss(req->getVaddr());
-#endif
+        } else {
+            if (FullSystem)
+                return new FastDataAccessMMUMiss;
+            else
+                return new FastDataAccessMMUMiss(req->getVaddr());
+        }
 
     }
 
diff --git a/src/arch/sparc/tlb.hh b/src/arch/sparc/tlb.hh
index fe6111759..cefa38175 100644
--- a/src/arch/sparc/tlb.hh
+++ b/src/arch/sparc/tlb.hh
@@ -34,7 +34,6 @@
 #include "arch/sparc/asi.hh"
 #include "arch/sparc/tlb_map.hh"
 #include "base/misc.hh"
-#include "config/full_system.hh"
 #include "mem/request.hh"
 #include "params/SparcTLB.hh"
 #include "sim/fault_fwd.hh"
-- 
cgit v1.2.3