From c541be3a48dc8252fe26e020122039a5e9b9193c Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Wed, 6 Dec 2006 05:42:09 -0500
Subject: Changed the integer register file to work with flattened indices.

--HG--
extra : convert_revision : c5153c3c712e5d18b5233e1fd205806adcb30654
---
 src/arch/sparc/intregfile.cc |  9 +++++++++
 src/arch/sparc/intregfile.hh | 10 ++++++++--
 2 files changed, 17 insertions(+), 2 deletions(-)

(limited to 'src/arch/sparc')

diff --git a/src/arch/sparc/intregfile.cc b/src/arch/sparc/intregfile.cc
index 0a8ac055f..594fe4bea 100644
--- a/src/arch/sparc/intregfile.cc
+++ b/src/arch/sparc/intregfile.cc
@@ -66,6 +66,7 @@ void IntRegFile::clear()
         memset(regGlobals[x], 0, sizeof(IntReg) * RegsPerFrame);
     for(int x = 0; x < 2 * NWindows; x++)
         memset(regSegments[x], 0, sizeof(IntReg) * RegsPerFrame);
+    memset(regs, 0, sizeof(IntReg) * NumIntRegs);
 }
 
 IntRegFile::IntRegFile()
@@ -78,6 +79,8 @@ IntRegFile::IntRegFile()
 
 IntReg IntRegFile::readReg(int intReg)
 {
+    DPRINTF(Sparc, "Read register %d = 0x%x\n", intReg, regs[intReg]);
+    return regs[intReg];
     IntReg val;
     if(intReg < NumIntArchRegs)
         val = regView[intReg >> FrameOffsetBits][intReg & FrameOffsetMask];
@@ -93,6 +96,12 @@ IntReg IntRegFile::readReg(int intReg)
 
 void IntRegFile::setReg(int intReg, const IntReg &val)
 {
+    if(intReg)
+    {
+        DPRINTF(Sparc, "Wrote register %d = 0x%x\n", intReg, val);
+        regs[intReg] = val;
+    }
+    return;
     if(intReg)
     {
         DPRINTF(Sparc, "Wrote register %d = 0x%x\n", intReg, val);
diff --git a/src/arch/sparc/intregfile.hh b/src/arch/sparc/intregfile.hh
index 59f767e8e..503f3c453 100644
--- a/src/arch/sparc/intregfile.hh
+++ b/src/arch/sparc/intregfile.hh
@@ -34,6 +34,7 @@
 
 #include "arch/sparc/isa_traits.hh"
 #include "arch/sparc/types.hh"
+#include "base/bitfield.hh"
 
 #include <string>
 
@@ -54,15 +55,19 @@ namespace SparcISA
       private:
         friend class RegFile;
       protected:
+        //The number of bits needed to index into each 8 register frame
         static const int FrameOffsetBits = 3;
+        //The number of bits to choose between the 4 sets of 8 registers
         static const int FrameNumBits = 2;
 
+        //The number of registers per "frame" (8)
         static const int RegsPerFrame = 1 << FrameOffsetBits;
-        static const int FrameNumMask =
+        //A mask to get the frame number
+        static const uint64_t FrameNumMask =
                 (FrameNumBits == sizeof(int)) ?
                 (unsigned int)(-1) :
                 (1 << FrameNumBits) - 1;
-        static const int FrameOffsetMask =
+        static const uint64_t FrameOffsetMask =
                 (FrameOffsetBits == sizeof(int)) ?
                 (unsigned int)(-1) :
                 (1 << FrameOffsetBits) - 1;
@@ -70,6 +75,7 @@ namespace SparcISA
         IntReg regGlobals[MaxGL][RegsPerFrame];
         IntReg regSegments[2 * NWindows][RegsPerFrame];
         IntReg microRegs[NumMicroIntRegs];
+        IntReg regs[NumIntRegs];
 
         enum regFrame {Globals, Outputs, Locals, Inputs, NumFrames};
 
-- 
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