From e09e9fa279dec86b171b5e3efeb7057fa0d21cc9 Mon Sep 17 00:00:00 2001 From: Andreas Sandberg Date: Mon, 7 Jan 2013 13:05:48 -0500 Subject: cpu: Flush TLBs on switchOut() This changeset inserts a TLB flush in BaseCPU::switchOut to prevent stale translations when doing repeated switching. Additionally, the TLB flushing functionality is exported to the Python to make debugging of switching/checkpointing easier. A simulation script will typically use the TLB flushing functionality to generate a reference trace. The following sequence can be used to simulate a handover (this depends on how drain is implemented, but is generally the case) between identically configured CPU models: m5.drain(test_sys) [ cpu.flushTLBs() for cpu in test_sys.cpu ] m5.resume(test_sys) The generated trace should normally be identical to a trace generated when switching between identically configured CPU models or checkpointing and resuming. --- src/arch/sparc/tlb.hh | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'src/arch/sparc') diff --git a/src/arch/sparc/tlb.hh b/src/arch/sparc/tlb.hh index 8ed10ff0e..7246cd4f6 100644 --- a/src/arch/sparc/tlb.hh +++ b/src/arch/sparc/tlb.hh @@ -114,6 +114,10 @@ class TLB : public BaseTLB */ TlbEntry *lookup(Addr va, int partition_id, bool real, int context_id = 0, bool update_used = true); + + /** Remove all entries from the TLB */ + void flushAll(); + protected: /** Insert a PTE into the TLB. */ void insert(Addr vpn, int partition_id, int context_id, bool real, @@ -122,9 +126,6 @@ class TLB : public BaseTLB /** Given an entry id, read that tlb entries' tag. */ uint64_t TagRead(int entry); - /** Remove all entries from the TLB */ - void flushAll(); - /** Remove all non-locked entries from the tlb that match partition id. */ void demapAll(int partition_id); -- cgit v1.2.3