From fce45baf178b43c2ea1476967fba3766e9b2ea9d Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Mon, 12 Nov 2007 14:38:31 -0800
Subject: X86: Work on the page table walker, TLB, and related faults.

--HG--
extra : convert_revision : 9edde958b7e571c07072785f18f9109f73b8059f
---
 src/arch/x86/faults.cc | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

(limited to 'src/arch/x86/faults.cc')

diff --git a/src/arch/x86/faults.cc b/src/arch/x86/faults.cc
index 13341f1de..abb5d98d7 100644
--- a/src/arch/x86/faults.cc
+++ b/src/arch/x86/faults.cc
@@ -93,6 +93,8 @@
 #include "arch/x86/isa_traits.hh"
 #include "mem/page_table.hh"
 #include "sim/process.hh"
+#else
+#include "arch/x86/tlb.hh"
 #endif
 
 namespace X86ISA
@@ -112,6 +114,19 @@ namespace X86ISA
     {
         panic("X86 faults are not implemented!");
     }
+
+    void FakeITLBFault::invoke(ThreadContext * tc)
+    {
+        // Start the page table walker.
+        tc->getITBPtr()->walker.start(tc, vaddr);
+    }
+
+    void FakeDTLBFault::invoke(ThreadContext * tc)
+    {
+        // Start the page table walker.
+        tc->getDTBPtr()->walker.start(tc, vaddr);
+    }
+
 #else // !FULL_SYSTEM
     void FakeITLBFault::invoke(ThreadContext * tc)
     {
-- 
cgit v1.2.3