From e0de2c34433be76eac7798e58e1ae02f5bffb732 Mon Sep 17 00:00:00 2001
From: Nathan Binkert <nate@binkert.org>
Date: Wed, 8 Apr 2009 22:21:27 -0700
Subject: tlb: More fixing of unified TLB

---
 src/arch/x86/faults.hh | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

(limited to 'src/arch/x86/faults.hh')

diff --git a/src/arch/x86/faults.hh b/src/arch/x86/faults.hh
index fe5132994..dbfb8d4d0 100644
--- a/src/arch/x86/faults.hh
+++ b/src/arch/x86/faults.hh
@@ -61,6 +61,7 @@
 #include "base/bitunion.hh"
 #include "base/misc.hh"
 #include "sim/faults.hh"
+#include "sim/tlb.hh"
 
 #include <string>
 
@@ -331,16 +332,16 @@ namespace X86ISA
             X86Fault("Page-Fault", "#PF", 14, _errorCode), addr(_addr)
         {}
 
-        PageFault(Addr _addr, bool present, bool write,
-                bool user, bool reserved, bool fetch) :
+        PageFault(Addr _addr, bool present, BaseTLB::Mode mode,
+                bool user, bool reserved) :
             X86Fault("Page-Fault", "#PF", 14, 0), addr(_addr)
         {
             PageFaultErrorCode code = 0;
             code.present = present;
-            code.write = write;
+            code.write = (mode == BaseTLB::Write);
             code.user = user;
             code.reserved = reserved;
-            code.fetch = fetch;
+            code.fetch = (mode == BaseTLB::Execute);
             errorCode = code;
         }
 
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