From 7d0344704a9ecc566d82ad43ec44b4becbaf4d77 Mon Sep 17 00:00:00 2001
From: Ali Saidi <Ali.Saidi@ARM.com>
Date: Fri, 24 Jan 2014 15:29:30 -0600
Subject: arch, cpu: Add support for flattening misc register indexes.

With ARMv8 support the same misc register id  results in accessing different
registers depending on the current mode of the processor. This patch adds
the same orthogonality to the misc register file as the others (int, float, cc).
For all the othre ISAs this is currently a null-implementation.

Additionally, a system variable is added to all the ISA objects.
---
 src/arch/x86/isa.hh | 6 ++++++
 1 file changed, 6 insertions(+)

(limited to 'src/arch/x86/isa.hh')

diff --git a/src/arch/x86/isa.hh b/src/arch/x86/isa.hh
index 5f36fd7ad..14c8e98c9 100644
--- a/src/arch/x86/isa.hh
+++ b/src/arch/x86/isa.hh
@@ -91,6 +91,12 @@ namespace X86ISA
             return reg;
         }
 
+        int
+        flattenMiscIndex(int reg)
+        {
+            return reg;
+        }
+
         void serialize(std::ostream &os);
         void unserialize(Checkpoint *cp, const std::string &section);
         void startup(ThreadContext *tc);
-- 
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