From d77d4c04b702fd8af1d268893bd71e7245f9c542 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Tue, 17 Jul 2007 15:36:45 -0700 Subject: Implement the jz instruction. --HG-- extra : convert_revision : 7c0bd7ce244f724ac03bbb5fdf770c7a3eba78b4 --- src/arch/x86/isa/decoder/one_byte_opcodes.isa | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/arch/x86/isa/decoder') diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa index 484f8160d..4be83bf54 100644 --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa @@ -263,7 +263,7 @@ 0x1: jno_Jb(); 0x2: jb_Jb(); 0x3: jnb_Jb(); - 0x4: jz_Jb(); + 0x4: Inst::JZ(Jb); 0x5: jnz_Jb(); 0x6: jbe_Jb(); 0x7: jnbe_Jb(); -- cgit v1.2.3 From 2e80f71dcd2367ceae00df88405deee66a68b9ca Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Tue, 17 Jul 2007 16:55:33 -0700 Subject: Implemented jnz. --HG-- extra : convert_revision : ea169ad68acbb3383443586b783b831b3a9eecf9 --- src/arch/x86/isa/decoder/one_byte_opcodes.isa | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/arch/x86/isa/decoder') diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa index 4be83bf54..546577662 100644 --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa @@ -264,7 +264,7 @@ 0x2: jb_Jb(); 0x3: jnb_Jb(); 0x4: Inst::JZ(Jb); - 0x5: jnz_Jb(); + 0x5: Inst::JNZ(Jb); 0x6: jbe_Jb(); 0x7: jnbe_Jb(); } -- cgit v1.2.3 From 5cca5ca3d9e5fffb284d5ffd3fc21de147f2f1d3 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 18 Jul 2007 16:11:52 -0700 Subject: Hook x86 nop into the decoder. --HG-- extra : convert_revision : 26f765ecf74a0bb6a1ec89816f1d630a1a8e4553 --- src/arch/x86/isa/decoder/one_byte_opcodes.isa | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/arch/x86/isa/decoder') diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa index 546577662..55fb3087d 100644 --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa @@ -322,7 +322,7 @@ 0x7: group10_Ev(); //Make sure this is Ev } 0x12: decode OPCODE_OP_BOTTOM3 { - default: nop_or_pause(); //Check for repe prefix + default: Inst::NOP(); //XXX repe makes this a "pause" 0x1: xchg_rCX_rAX(); 0x2: xchg_rDX_rAX(); 0x3: xchg_rVX_rAX(); -- cgit v1.2.3 From bafb7ee5c1ba31c9a52de835a24d9df65b818ab6 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 18 Jul 2007 16:26:52 -0700 Subject: Fix the operand types in a section of the decoder. --HG-- extra : convert_revision : c37600fd65b44817eed2ba653f9d4f08a9869874 --- src/arch/x86/isa/decoder/one_byte_opcodes.isa | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'src/arch/x86/isa/decoder') diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa index 55fb3087d..6c54f77bc 100644 --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa @@ -297,14 +297,14 @@ } //0x3: group1_Ev_Ib(); 0x3: decode MODRM_REG { - 0x0: add_Eb_Ib(); - 0x1: or_Eb_Ib(); - 0x2: adc_Eb_Ib(); - 0x3: sbb_Eb_Ib(); - 0x4: Inst::AND(Eb,Ib); - 0x5: sub_Eb_Ib(); - 0x6: xor_Eb_Ib(); - 0x7: cmp_Eb_Ib(); + 0x0: add_Ev_Ib(); + 0x1: or_Ev_Ib(); + 0x2: adc_Ev_Ib(); + 0x3: sbb_Ev_Ib(); + 0x4: Inst::AND(Ev,Ib); + 0x5: sub_Ev_Ib(); + 0x6: xor_Ev_Ib(); + 0x7: cmp_Ev_Ib(); } 0x4: Inst::TEST(Eb,Gb); 0x5: Inst::TEST(Ev,Gv); -- cgit v1.2.3 From 6c54b654a880ffa83a16a043d90612bd49815de6 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 18 Jul 2007 16:33:56 -0700 Subject: Implement some forms of add. --HG-- extra : convert_revision : adbff2e9b9952ec09853cc43d40243e7262410a7 --- src/arch/x86/isa/decoder/one_byte_opcodes.isa | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/arch/x86/isa/decoder') diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa index 6c54f77bc..82e50e745 100644 --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa @@ -297,7 +297,7 @@ } //0x3: group1_Ev_Ib(); 0x3: decode MODRM_REG { - 0x0: add_Ev_Ib(); + 0x0: Inst::ADD(Ev,Ib); 0x1: or_Ev_Ib(); 0x2: adc_Ev_Ib(); 0x3: sbb_Ev_Ib(); -- cgit v1.2.3 From f6d326d6fcd505068ffff4014b19d4fa27f2e5be Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 18 Jul 2007 17:48:16 -0700 Subject: Hook near returns into the decoder. --HG-- extra : convert_revision : b38d4417552991e44f5d1de1f35d5d1ad8f32340 --- src/arch/x86/isa/decoder/one_byte_opcodes.isa | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/arch/x86/isa/decoder') diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa index 82e50e745..12bebd47b 100644 --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa @@ -398,7 +398,7 @@ 0x0: group2_Eb_Ib(); 0x1: group2_Ev_Ib(); 0x2: ret_near_Iw(); - 0x3: ret_near(); + 0x3: Inst::RET(); 0x4: decode MODE_SUBMODE { 0x0: This_should_be_an_illegal_instruction(); default: les_Gz_Mp(); -- cgit v1.2.3 From 09f056a1ef324b540818f1d85377fb09af44a0f1 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 18 Jul 2007 17:51:05 -0700 Subject: Check for the two opcode prefix correctly and add in some instructions. --HG-- extra : convert_revision : 751e54843f5c81b81529050a1ae9d46d07c36e97 --- src/arch/x86/isa/decoder/two_byte_opcodes.isa | 22 ++++++++++------------ 1 file changed, 10 insertions(+), 12 deletions(-) (limited to 'src/arch/x86/isa/decoder') diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa index f05c33bdb..7fc571205 100644 --- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa @@ -58,7 +58,7 @@ // Decode the two byte opcodes // 0x2: decode OPCODE_PREFIXA { - 0xF0: decode OPCODE_OP_TOP5 { + 0x0F: decode OPCODE_OP_TOP5 { format WarnUnimpl { 0x00: decode OPCODE_OP_BOTTOM3 { 0x00: group6(); @@ -67,9 +67,7 @@ 0x03: lsl_Gv_Ew(); //sandpile.org doesn't seem to know what this is... ? 0x04: loadall_or_reset_or_hang(); - //sandpile.org says (AMD) after syscall, so I might want to check - //if that means amd64 or AMD machines - 0x05: loadall_or_syscall(); + 0x05: syscall(); 0x06: clts(); //sandpile.org says (AMD) after sysret, so I might want to check //if that means amd64 or AMD machines @@ -226,14 +224,14 @@ 0x7: holder(); } 0x10: decode OPCODE_OP_BOTTOM3 { - 0x0: holder(); - 0x1: holder(); - 0x2: holder(); - 0x3: holder(); - 0x4: holder(); - 0x5: holder(); - 0x6: holder(); - 0x7: holder(); + 0x0: jo_Jz(); + 0x1: jno_Jz(); + 0x2: jb_Jz(); + 0x3: jnb_Jz(); + 0x4: jz_Jz(); + 0x5: Inst::JNZ(Jz); + 0x6: jbe_Jz(); + 0x7: jnbe_Jz(); } 0x11: decode OPCODE_OP_BOTTOM3 { 0x0: holder(); -- cgit v1.2.3 From cfadef74d1d7ce47d0bd30a14a509a15a354849a Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Thu, 19 Jul 2007 15:15:47 -0700 Subject: x86 fixes Make the emulation environment consider the rex prefix. Implement and hook in forms of j, jmp, cmp, syscall, movzx Added a format for an instruction to carry a call to the SE mode syscalls system Made memory instructions which refer to the rip do so directly Made the operand size overridable in the microassembly Made the "ext" field of register operations 16 bits to hold a sparse encoding of flags to set or conditions to predicate on Added an explicit "rax" operand for the syscall format Implemented syscall returns. --HG-- extra : convert_revision : ae84bd8c6a1d400906e17e8b8c4185f2ebd4c5f2 --- src/arch/x86/isa/decoder/one_byte_opcodes.isa | 10 +- src/arch/x86/isa/decoder/two_byte_opcodes.isa | 234 +++++++++++++------------- 2 files changed, 124 insertions(+), 120 deletions(-) (limited to 'src/arch/x86/isa/decoder') diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa index 12bebd47b..ee6072454 100644 --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa @@ -163,8 +163,8 @@ 0x1: cmp_Ev_Gv(); 0x2: cmp_Gb_Eb(); 0x3: cmp_Gv_Ev(); - 0x4: cmp_Al_Ib(); - 0x5: cmp_rAX_Iz(); + 0x4: Inst::CMP(rAl,Ib); + 0x5: Inst::CMP(rAX,Iz); 0x6: M5InternalError::error( {{"Tried to execute the DS segment override prefix!"}}); 0x7: decode MODE_SUBMODE { @@ -262,10 +262,10 @@ 0x0: jo_Jb(); 0x1: jno_Jb(); 0x2: jb_Jb(); - 0x3: jnb_Jb(); + 0x3: Inst::JNB(Jb); 0x4: Inst::JZ(Jb); 0x5: Inst::JNZ(Jb); - 0x6: jbe_Jb(); + 0x6: Inst::JBE(Jb); 0x7: jnbe_Jb(); } 0x0F: decode OPCODE_OP_BOTTOM3 { @@ -475,7 +475,7 @@ 0x0: This_should_be_an_illegal_instruction(); default: jmp_Ap(); } - 0x3: jmp_Jb(); + 0x3: Inst::JMP(Jb); 0x4: in_Al_Dx(); 0x5: in_eAX_Dx(); 0x6: out_Dx_Al(); diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa index 7fc571205..e042893bb 100644 --- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa @@ -67,21 +67,25 @@ 0x03: lsl_Gv_Ew(); //sandpile.org doesn't seem to know what this is... ? 0x04: loadall_or_reset_or_hang(); +#if FULL_SYSTEM 0x05: syscall(); +#else + 0x05: SyscallInst::syscall('xc->syscall(rax)'); +#endif 0x06: clts(); //sandpile.org says (AMD) after sysret, so I might want to check //if that means amd64 or AMD machines 0x07: loadall_or_sysret(); } 0x01: decode OPCODE_OP_BOTTOM3 { - 0x0: holderholder(); - 0x1: holder(); - 0x2: holder(); - 0x3: holder(); - 0x4: holder(); - 0x5: holder(); - 0x6: holder(); - 0x7: holder(); + 0x0: invd(); + 0x1: wbinvd(); + 0x2: This_should_be_an_illegal_instruction(); + 0x3: UD1(); + 0x4: This_should_be_an_illegal_instruction(); + 0x5: threednow(); + 0x6: threednow(); + 0x7: threednow(); } 0x02: decode OPCODE_OP_BOTTOM3 { 0x0: holder(); @@ -94,14 +98,14 @@ 0x7: holder(); } 0x03: decode OPCODE_OP_BOTTOM3 { - 0x0: holder(); - 0x1: holder(); - 0x2: holder(); - 0x3: holder(); - 0x4: holder(); - 0x5: holder(); - 0x6: holder(); - 0x7: holder(); + 0x0: group17(); + 0x1: group17(); + 0x2: group17(); + 0x3: group17(); + 0x4: group17(); + 0x5: group17(); + 0x6: group17(); + 0x7: group17(); } 0x04: decode OPCODE_OP_BOTTOM3 { 0x0: holder(); @@ -124,44 +128,44 @@ 0x7: holder(); } 0x06: decode OPCODE_OP_BOTTOM3 { - 0x0: holder(); - 0x1: holder(); - 0x2: holder(); - 0x3: holder(); - 0x4: holder(); - 0x5: holder(); - 0x6: holder(); - 0x7: holder(); + 0x0: wrmsr(); + 0x1: rdtsc(); + 0x2: rdmsr(); + 0x3: rdpmc(); + 0x4: sysenter(); + 0x5: sysexit(); + 0x6: This_should_be_an_illegal_instruction(); + 0x7: getsec(); } 0x07: decode OPCODE_OP_BOTTOM3 { - 0x0: holder(); - 0x1: holder(); - 0x2: holder(); - 0x3: holder(); - 0x4: holder(); - 0x5: holder(); - 0x6: holder(); - 0x7: holder(); + 0x0: three_byte_opcode(); + 0x1: three_byte_opcode(); + 0x2: three_byte_opcode(); + 0x3: three_byte_opcode(); + 0x4: three_byte_opcode(); + 0x5: three_byte_opcode(); + 0x6: three_byte_opcode(); + 0x7: three_byte_opcode(); } 0x08: decode OPCODE_OP_BOTTOM3 { - 0x0: holder(); - 0x1: holder(); - 0x2: holder(); - 0x3: holder(); - 0x4: holder(); - 0x5: holder(); - 0x6: holder(); - 0x7: holder(); + 0x0: cmovo_Gv_Ev(); + 0x1: cmovno_Gv_Ev(); + 0x2: cmovb_Gv_Ev(); + 0x3: cmovnb_Gv_Ev(); + 0x4: cmovz_Gv_Ev(); + 0x5: cmovnz_Gv_Ev(); + 0x6: cmovbe_Gv_Ev(); + 0x7: cmovnbe_Gv_Ev(); } 0x09: decode OPCODE_OP_BOTTOM3 { - 0x0: holder(); - 0x1: holder(); - 0x2: holder(); - 0x3: holder(); - 0x4: holder(); - 0x5: holder(); - 0x6: holder(); - 0x7: holder(); + 0x0: cmovs_Gv_Ev(); + 0x1: cmovns_Gv_Ev(); + 0x2: cmovp_Gv_Ev(); + 0x3: cmovnp_Gv_Ev(); + 0x4: cmovl_Gv_Ev(); + 0x5: cmovnl_Gv_Ev(); + 0x6: cmovle_Gv_Ev(); + 0x7: cmovnle_Gv_Ev(); } 0x0A: decode OPCODE_OP_BOTTOM3 { 0x0: holder(); @@ -227,81 +231,81 @@ 0x0: jo_Jz(); 0x1: jno_Jz(); 0x2: jb_Jz(); - 0x3: jnb_Jz(); - 0x4: jz_Jz(); + 0x3: Inst::JNB(Jz); + 0x4: Inst::JZ(Jz); 0x5: Inst::JNZ(Jz); - 0x6: jbe_Jz(); + 0x6: Inst::JBE(Jz); 0x7: jnbe_Jz(); } 0x11: decode OPCODE_OP_BOTTOM3 { - 0x0: holder(); - 0x1: holder(); - 0x2: holder(); - 0x3: holder(); - 0x4: holder(); - 0x5: holder(); - 0x6: holder(); - 0x7: holder(); + 0x0: js_Jz(); + 0x1: jns_Jz(); + 0x2: jp_Jz(); + 0x3: jnp_Jz(); + 0x4: jl_Jz(); + 0x5: jnl_Jz(); + 0x6: jle_Jz(); + 0x7: jnle_Jz(); } 0x12: decode OPCODE_OP_BOTTOM3 { - 0x0: holder(); - 0x1: holder(); - 0x2: holder(); - 0x3: holder(); - 0x4: holder(); - 0x5: holder(); - 0x6: holder(); - 0x7: holder(); + 0x0: seto_Eb(); + 0x1: setno_Eb(); + 0x2: setb_Eb(); + 0x3: setnb_Eb(); + 0x4: setz_Eb(); + 0x5: setnz_Eb(); + 0x6: setbe_Eb(); + 0x7: setnbe_Eb(); } 0x13: decode OPCODE_OP_BOTTOM3 { - 0x0: holder(); - 0x1: holder(); - 0x2: holder(); - 0x3: holder(); - 0x4: holder(); - 0x5: holder(); - 0x6: holder(); - 0x7: holder(); + 0x0: sets_Eb(); + 0x1: setns_Eb(); + 0x2: setp_Eb(); + 0x3: setnp_Eb(); + 0x4: setl_Eb(); + 0x5: setnl_Eb(); + 0x6: setle_Eb(); + 0x7: setnle_Eb(); } 0x14: decode OPCODE_OP_BOTTOM3 { - 0x0: holder(); - 0x1: holder(); - 0x2: holder(); - 0x3: holder(); - 0x4: holder(); - 0x5: holder(); - 0x6: holder(); - 0x7: holder(); + 0x0: push_fs(); + 0x1: pop_fs(); + 0x2: cpuid(); + 0x3: bt_Ev_Gv(); + 0x4: shld_Ev_Gv_Ib(); + 0x5: shld_Ev_Gv_rCl(); + 0x6: xbts_and_cmpxchg(); + 0x7: ibts_and_cmpxchg(); } 0x15: decode OPCODE_OP_BOTTOM3 { - 0x0: holder(); - 0x1: holder(); - 0x2: holder(); - 0x3: holder(); - 0x4: holder(); - 0x5: holder(); - 0x6: holder(); - 0x7: holder(); + 0x0: push_gs(); + 0x1: pop_gs(); + 0x2: rsm_smm(); + 0x3: bts_Ev_Gv(); + 0x4: shrd_Ev_Gv_Ib(); + 0x5: shrd_Ev_Gv_rCl(); + 0x6: group16(); + 0x7: imul_Gv_Ev(); } 0x16: decode OPCODE_OP_BOTTOM3 { - 0x0: holder(); - 0x1: holder(); - 0x2: holder(); - 0x3: holder(); - 0x4: holder(); - 0x5: holder(); - 0x6: holder(); - 0x7: holder(); + 0x0: cmpxchg_Eb_Gb(); + 0x1: cmpxchg_Ev_Gv(); + 0x2: lss_Gz_Mp(); + 0x3: btr_Ev_Gv(); + 0x4: lfs_Gz_Mp(); + 0x5: lgs_Gz_Mp(); + 0x6: Inst::MOVZX_B(Gv,Eb); + 0x7: Inst::MOVZX_W(Gv,Ew); } 0x17: decode OPCODE_OP_BOTTOM3 { - 0x0: holder(); - 0x1: holder(); - 0x2: holder(); - 0x3: holder(); - 0x4: holder(); - 0x5: holder(); - 0x6: holder(); - 0x7: holder(); + 0x0: jmpe_Jz(); // IA-64? + 0x1: group11_UD2(); + 0x2: group8_Ev_Ib(); + 0x3: btc_Ev_Gv(); + 0x4: bsf_Gv_Ev(); + 0x5: bsr_Gv_Ev(); + 0x6: movsx_Gv_Eb(); + 0x7: movsx_Gv_Ew(); } 0x18: decode OPCODE_OP_BOTTOM3 { 0x0: holder(); @@ -314,14 +318,14 @@ 0x7: holder(); } 0x19: decode OPCODE_OP_BOTTOM3 { - 0x0: holder(); - 0x1: holder(); - 0x2: holder(); - 0x3: holder(); - 0x4: holder(); - 0x5: holder(); - 0x6: holder(); - 0x7: holder(); + 0x0: bswap_rAx(); + 0x1: bswap_rCx(); + 0x2: bswap_rDx(); + 0x3: bswap_rBx(); + 0x4: bswap_rSP(); + 0x5: bswap_rBP(); + 0x6: bswap_rSI(); + 0x7: bswap_rDI(); } 0x1A: decode OPCODE_OP_BOTTOM3 { 0x0: holder(); -- cgit v1.2.3 From 705a22b999b92283ab1df0c7b3476022f8b0c0d2 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Fri, 20 Jul 2007 15:05:37 -0700 Subject: Hook in newly implemented instructions. --HG-- extra : convert_revision : 53319d2363211af407dabaa2b63ad8a4df09c369 --- src/arch/x86/isa/decoder/one_byte_opcodes.isa | 50 ++++++++++++++++----------- src/arch/x86/isa/decoder/two_byte_opcodes.isa | 8 ++--- 2 files changed, 34 insertions(+), 24 deletions(-) (limited to 'src/arch/x86/isa/decoder') diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa index ee6072454..b897a225b 100644 --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa @@ -176,28 +176,28 @@ 0x0: M5InternalError::error ( {{"Tried to execute an REX prefix!"}}); default: decode OPCODE_OP_BOTTOM3 { - 0x0: inc_eAX(); - 0x1: inc_eCX(); - 0x2: inc_eDX(); - 0x3: inc_eBX(); - 0x4: inc_eSP(); - 0x5: inc_eBP(); - 0x6: inc_eSI(); - 0x7: inc_eDI(); + 0x0: Inst::INC(rAx); + 0x1: Inst::INC(rCx); + 0x2: Inst::INC(rDx); + 0x3: Inst::INC(rBx); + 0x4: Inst::INC(rSP); + 0x5: Inst::INC(rBP); + 0x6: Inst::INC(rSI); + 0x7: Inst::INC(rDI); } } 0x09: decode MODE_SUBMODE { 0x0: M5InternalError::error ( {{"Tried to execute an REX prefix!"}}); default: decode OPCODE_OP_BOTTOM3 { - 0x0: dec_eAX(); - 0x1: dec_eCX(); - 0x2: dec_eDX(); - 0x3: dec_eBX(); - 0x4: dec_eSP(); - 0x5: dec_eBP(); - 0x6: dec_eSI(); - 0x7: dec_eDI(); + 0x0: Inst::DEC(rAx); + 0x1: Inst::DEC(rCX); + 0x2: Inst::DEC(rDx); + 0x3: Inst::DEC(rBx); + 0x4: Inst::DEC(rSP); + 0x5: Inst::DEC(rBP); + 0x6: Inst::DEC(rSI); + 0x7: Inst::DEC(rDI); } } format Inst { @@ -266,7 +266,7 @@ 0x4: Inst::JZ(Jb); 0x5: Inst::JNZ(Jb); 0x6: Inst::JBE(Jb); - 0x7: jnbe_Jb(); + 0x7: Inst::JNBE(Jb); } 0x0F: decode OPCODE_OP_BOTTOM3 { 0x0: js_Jb(); @@ -398,7 +398,7 @@ 0x0: group2_Eb_Ib(); 0x1: group2_Ev_Ib(); 0x2: ret_near_Iw(); - 0x3: Inst::RET(); + 0x3: Inst::RET_NEAR(); 0x4: decode MODE_SUBMODE { 0x0: This_should_be_an_illegal_instruction(); default: les_Gz_Mp(); @@ -469,7 +469,7 @@ 0x7: out_Ib_eAX(); } 0x1D: decode OPCODE_OP_BOTTOM3 { - 0x0: Inst::CALL(Jz); + 0x0: Inst::CALL_NEAR(Jz); 0x1: jmp_Jz(); 0x2: decode MODE_SUBMODE { 0x0: This_should_be_an_illegal_instruction(); @@ -502,7 +502,17 @@ 0x4: cld(); 0x5: std(); 0x6: group4(); - 0x7: group5(); + //0x7: group5(); + 0x7: decode MODRM_REG { + 0x0: Inst::INC(Ev); + 0x1: dev_Ev(); + 0x2: call_Ev(); + 0x3: call_Mp(); + 0x4: jmp_Ev(); + 0x5: jmp_Mp(); + 0x6: push_Ev(); + 0x7: This_should_be_an_illegal_instruction(); + } } } default: FailUnimpl::oneByteOps(); diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa index e042893bb..6adcf866f 100644 --- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa @@ -235,7 +235,7 @@ 0x4: Inst::JZ(Jz); 0x5: Inst::JNZ(Jz); 0x6: Inst::JBE(Jz); - 0x7: jnbe_Jz(); + 0x7: Inst::JNBE(Jz); } 0x11: decode OPCODE_OP_BOTTOM3 { 0x0: js_Jz(); @@ -285,7 +285,7 @@ 0x4: shrd_Ev_Gv_Ib(); 0x5: shrd_Ev_Gv_rCl(); 0x6: group16(); - 0x7: imul_Gv_Ev(); + 0x7: Inst::IMUL(Gv,Ev); } 0x16: decode OPCODE_OP_BOTTOM3 { 0x0: cmpxchg_Eb_Gb(); @@ -304,8 +304,8 @@ 0x3: btc_Ev_Gv(); 0x4: bsf_Gv_Ev(); 0x5: bsr_Gv_Ev(); - 0x6: movsx_Gv_Eb(); - 0x7: movsx_Gv_Ew(); + 0x6: Inst::MOVSX_B(Gv,Eb); + 0x7: Inst::MOVSX_W(Gv,Ew); } 0x18: decode OPCODE_OP_BOTTOM3 { 0x0: holder(); -- cgit v1.2.3 From 1ed6a8ed79d9a89437d47d52390aa5c7a8ebd5d5 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Fri, 20 Jul 2007 16:39:07 -0700 Subject: Define and fill out a lot of different instructions and instruction versions. Added two of the shift microops. --HG-- extra : convert_revision : 0b76953dbb1dc3366242d4d209cccebde86bbe4e --- src/arch/x86/isa/decoder/one_byte_opcodes.isa | 110 +++++++++++++++++--------- 1 file changed, 71 insertions(+), 39 deletions(-) (limited to 'src/arch/x86/isa/decoder') diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa index b897a225b..80031a7fc 100644 --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa @@ -61,8 +61,6 @@ 0x1: decode OPCODE_OP_TOP5 { format WarnUnimpl { 0x00: decode OPCODE_OP_BOTTOM3 { - 0x4: ADD(); - 0x5: ADD(); 0x6: decode MODE_SUBMODE { 0x0: This_should_be_an_illegal_instruction(); default: push_ES(); @@ -71,15 +69,12 @@ 0x0: This_should_be_an_illegal_instruction(); default: pop_ES(); } - default: ADD(); + default: MultiInst::ADD(OPCODE_OP_BOTTOM3, + [Eb,Gb], [Ev,Gv], + [Gb,Eb], [Gv,Ev], + [rAl,Ib], [rAx,Iz]); } 0x01: decode OPCODE_OP_BOTTOM3 { - 0x0: or_Eb_Gb(); - 0x1: or_Ev_Gv(); - 0x2: or_Gb_Eb(); - 0x3: or_Gv_Ev(); - 0x4: or_Al_Ib(); - 0x5: or_rAX_Iz(); 0x6: decode MODE_SUBMODE { 0x0: This_should_be_an_illegal_instruction(); default: push_CS(); @@ -87,6 +82,10 @@ //Any time this is seen, it should generate a two byte opcode 0x7: M5InternalError::error( {{"Saw a one byte opcode whose value was 0x0F!"}}); + default: MultiInst::OR(OPCODE_OP_BOTTOM3, + [Eb,Gb], [Ev,Gv], + [Gb,Eb], [Gv,Ev], + [rAl,Ib], [rAx,Iz]); } 0x02: decode OPCODE_OP_BOTTOM3 { 0x0: adc_Eb_Gb(); @@ -121,33 +120,27 @@ } } 0x04: decode OPCODE_OP_BOTTOM3 { - 0x0: and_Eb_Gb(); - 0x1: and_Ev_Gv(); - 0x2: and_Gb_Eb(); - 0x3: and_Gv_Ev(); - 0x4: and_Al_Ib(); - 0x5: and_rAX_Iz(); 0x6: M5InternalError::error( {{"Tried to execute the ES segment override prefix!"}}); 0x7: decode MODE_SUBMODE { 0x0: This_should_be_an_illegal_instruction(); default: daa(); } + default: MultiInst::AND(OPCODE_OP_BOTTOM3, + [Eb,Gb], [Ev,Gv], + [Gb,Eb], [Gv,Ev], + [rAl,Ib], [rAx,Iz]); } 0x05: decode OPCODE_OP_BOTTOM3 { - 0x0: sub_Eb_Gb(); - 0x1: sub_Ev_Gv(); - 0x2: sub_Gb_Eb(); - 0x3: sub_Gv_Ev(); - 0x4: sub_Al_Ib(); - 0x5: sub_rAX_Iz(); 0x6: M5InternalError::error( {{"Tried to execute the CS segment override prefix!"}}); 0x7: das(); + default: MultiInst::SUB(OPCODE_OP_BOTTOM3, + [Eb,Gb], [Ev,Gv], + [Gb,Eb], [Gv,Ev], + [rAl,Ib], [rAx,Iz]); } 0x06: decode OPCODE_OP_BOTTOM3 { - 0x4: Inst::XOR(rAl,Ib); - 0x5: Inst::XOR(rAx,Iz); 0x6: M5InternalError::error( {{"Tried to execute the SS segment override prefix!"}}); 0x7: decode MODE_SUBMODE { @@ -156,21 +149,20 @@ } default: MultiInst::XOR(OPCODE_OP_BOTTOM3, [Eb,Gb], [Ev,Gv], - [Gb,Eb], [Gv,Ev]); + [Gb,Eb], [Gv,Ev], + [rAl,Ib], [rAx,Iz]); } 0x07: decode OPCODE_OP_BOTTOM3 { - 0x0: cmp_Eb_Gb(); - 0x1: cmp_Ev_Gv(); - 0x2: cmp_Gb_Eb(); - 0x3: cmp_Gv_Ev(); - 0x4: Inst::CMP(rAl,Ib); - 0x5: Inst::CMP(rAX,Iz); 0x6: M5InternalError::error( {{"Tried to execute the DS segment override prefix!"}}); 0x7: decode MODE_SUBMODE { 0x0: This_should_be_an_illegal_instruction(); default: aas(); } + default: MultiInst::CMP(OPCODE_OP_BOTTOM3, + [Eb,Gb], [Ev,Gv], + [Gb,Eb], [Gv,Ev], + [rAl,Ib], [rAx,Iz]); } 0x08: decode MODE_SUBMODE { 0x0: M5InternalError::error ( @@ -276,10 +268,20 @@ 0x4: jl_Jb(); 0x5: jnl_Jb(); 0x6: jle_Jb(); - 0x7: jnke_Jb(); + 0x7: Inst::JNLE(Jb); } 0x10: decode OPCODE_OP_BOTTOM3 { - 0x0: group1_Eb_Ib(); + //0x0: group1_Eb_Ib(); + 0x0: decode MODRM_REG { + 0x0: Inst::ADD(Eb,Ib); + 0x1: Inst::OR(Eb,Ib); + 0x2: adc_Eb_Ib(); + 0x3: sbb_Eb_Ib(); + 0x4: Inst::AND(Eb,Ib); + 0x5: Inst::SUB(Eb,Ib); + 0x6: Inst::XOR(Eb,Ib); + 0x7: Inst::CMP(Eb,Ib); + } //0x1: group1_Ev_Iz(); 0x1: decode MODRM_REG { 0x0: add_Ev_Iz(); @@ -289,11 +291,21 @@ 0x4: Inst::AND(Ev,Iz); 0x5: Inst::SUB(Ev,Iz); 0x6: xor_Ev_Iz(); - 0x7: cmp_Ev_Iz(); + 0x7: Inst::CMP(Ev,Iz); } 0x2: decode MODE_SUBMODE { 0x0: This_should_be_an_illegal_instruction(); - default: group1_Eb_Ib(); + //default: group1_Eb_Ib(); + default: decode MODRM_REG { + 0x0: Inst::ADD(Eb,Ib); + 0x1: Inst::OR(Eb,Ib); + 0x2: adc_Eb_Ib(); + 0x3: sbb_Eb_Ib(); + 0x4: Inst::AND(Eb,Ib); + 0x5: Inst::SUB(Eb,Ib); + 0x6: Inst::XOR(Eb,Ib); + 0x7: Inst::CMP(Eb,Ib); + } } //0x3: group1_Ev_Ib(); 0x3: decode MODRM_REG { @@ -304,7 +316,7 @@ 0x4: Inst::AND(Ev,Ib); 0x5: sub_Ev_Ib(); 0x6: xor_Ev_Ib(); - 0x7: cmp_Ev_Ib(); + 0x7: Inst::CMP(Ev,Ib); } 0x4: Inst::TEST(Eb,Gb); 0x5: Inst::TEST(Ev,Gv); @@ -322,10 +334,10 @@ 0x7: group10_Ev(); //Make sure this is Ev } 0x12: decode OPCODE_OP_BOTTOM3 { - default: Inst::NOP(); //XXX repe makes this a "pause" + 0x0: Inst::NOP(); //XXX repe makes this a "pause" 0x1: xchg_rCX_rAX(); 0x2: xchg_rDX_rAX(); - 0x3: xchg_rVX_rAX(); + 0x3: xchg_rBX_rAX(); 0x4: xchg_rSP_rAX(); 0x5: xchg_rBP_rAX(); 0x6: xchg_rSI_rAX(); @@ -395,8 +407,28 @@ } } 0x18: decode OPCODE_OP_BOTTOM3 { - 0x0: group2_Eb_Ib(); - 0x1: group2_Ev_Ib(); + //0x0: group2_Eb_Ib(); + 0x0: decode MODRM_REG { + 0x0: rol_Eb_Ib(); + 0x1: ror_Eb_Ib(); + 0x2: rcl_Eb_Ib(); + 0x3: rcr_Eb_Ib(); + 0x4: Inst::SAL(Eb,Ib); + 0x5: shr_Eb_Ib(); + 0x6: Inst::SAL(Eb,Ib); + 0x7: sar_Eb_Ib(); + } + //0x1: group2_Ev_Ib(); + 0x1: decode MODRM_REG { + 0x0: rol_Ev_Ib(); + 0x1: ror_Ev_Ib(); + 0x2: rcl_Ev_Ib(); + 0x3: rcr_Ev_Ib(); + 0x4: Inst::SAL(Ev,Ib); + 0x5: shr_Ev_Ib(); + 0x6: Inst::SAL(Ev,Ib); + 0x7: sar_Ev_Ib(); + } 0x2: ret_near_Iw(); 0x3: Inst::RET_NEAR(); 0x4: decode MODE_SUBMODE { -- cgit v1.2.3 From 231cc3effb193c27ae10009444c5ee7cf2509a06 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Fri, 20 Jul 2007 16:48:59 -0700 Subject: Make the decoder take advantage of the new "B" operand format which takes a register index from the opcode itself. --HG-- extra : convert_revision : 35f9be6559ee9833049eda1817982efdde7082be --- src/arch/x86/isa/decoder/one_byte_opcodes.isa | 77 +++++---------------------- src/arch/x86/isa/decoder/two_byte_opcodes.isa | 11 +--- 2 files changed, 13 insertions(+), 75 deletions(-) (limited to 'src/arch/x86/isa/decoder') diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa index 80031a7fc..42404ab91 100644 --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa @@ -167,52 +167,16 @@ 0x08: decode MODE_SUBMODE { 0x0: M5InternalError::error ( {{"Tried to execute an REX prefix!"}}); - default: decode OPCODE_OP_BOTTOM3 { - 0x0: Inst::INC(rAx); - 0x1: Inst::INC(rCx); - 0x2: Inst::INC(rDx); - 0x3: Inst::INC(rBx); - 0x4: Inst::INC(rSP); - 0x5: Inst::INC(rBP); - 0x6: Inst::INC(rSI); - 0x7: Inst::INC(rDI); - } + default: Inst::INC(B); } 0x09: decode MODE_SUBMODE { 0x0: M5InternalError::error ( {{"Tried to execute an REX prefix!"}}); - default: decode OPCODE_OP_BOTTOM3 { - 0x0: Inst::DEC(rAx); - 0x1: Inst::DEC(rCX); - 0x2: Inst::DEC(rDx); - 0x3: Inst::DEC(rBx); - 0x4: Inst::DEC(rSP); - 0x5: Inst::DEC(rBP); - 0x6: Inst::DEC(rSI); - 0x7: Inst::DEC(rDI); - } + default: Inst::DEC(B); } format Inst { - 0x0A: decode OPCODE_OP_BOTTOM3 { - 0x0: PUSH(rAx); - 0x1: PUSH(rCx); - 0x2: PUSH(rDx); - 0x3: PUSH(rBx); - 0x4: PUSH(rSP); - 0x5: PUSH(rBP); - 0x6: PUSH(rSI); - 0x7: PUSH(rDI); - } - 0x0B: decode OPCODE_OP_BOTTOM3 { - 0x0: POP(rAx); - 0x1: POP(rCx); - 0x2: POP(rDx); - 0x3: POP(rBx); - 0x4: POP(rSP); - 0x5: POP(rBP); - 0x6: POP(rSI); - 0x7: POP(rDI); - } + 0x0A: PUSH(B); + 0x0B: POP(B); } 0x0C: decode OPCODE_OP_BOTTOM3 { 0x0: decode MODE_SUBMODE { @@ -284,13 +248,13 @@ } //0x1: group1_Ev_Iz(); 0x1: decode MODRM_REG { - 0x0: add_Ev_Iz(); - 0x1: or_Ev_Ibz(); + 0x0: Inst::ADD(Ev,Iz); + 0x1: Inst::OR(Ev,Iz); 0x2: adc_Ev_Iz(); 0x3: sbb_Ev_Iz(); 0x4: Inst::AND(Ev,Iz); 0x5: Inst::SUB(Ev,Iz); - 0x6: xor_Ev_Iz(); + 0x6: Inst::XOR(Ev,Iz); 0x7: Inst::CMP(Ev,Iz); } 0x2: decode MODE_SUBMODE { @@ -310,12 +274,12 @@ //0x3: group1_Ev_Ib(); 0x3: decode MODRM_REG { 0x0: Inst::ADD(Ev,Ib); - 0x1: or_Ev_Ib(); + 0x1: Inst::OR(Ev,Ib); 0x2: adc_Ev_Ib(); 0x3: sbb_Ev_Ib(); 0x4: Inst::AND(Ev,Ib); - 0x5: sub_Ev_Ib(); - 0x6: xor_Ev_Ib(); + 0x5: Inst::SUB(Ev,Ib); + 0x6: Inst::XOR(Ev,Ib); 0x7: Inst::CMP(Ev,Ib); } 0x4: Inst::TEST(Eb,Gb); @@ -335,13 +299,7 @@ } 0x12: decode OPCODE_OP_BOTTOM3 { 0x0: Inst::NOP(); //XXX repe makes this a "pause" - 0x1: xchg_rCX_rAX(); - 0x2: xchg_rDX_rAX(); - 0x3: xchg_rBX_rAX(); - 0x4: xchg_rSP_rAX(); - 0x5: xchg_rBP_rAX(); - 0x6: xchg_rSI_rAX(); - 0x7: xchg_rDI_rAX(); + default: xchg_B_rAX(); } 0x13: decode OPCODE_OP_BOTTOM3 { 0x0: cbw_or_cwde_or_cdqe_rAX(); @@ -394,18 +352,7 @@ 0x6: mov_Dh_Ib(); 0x7: mov_Bh_Ib(); } - format Inst { - 0x17: decode OPCODE_OP_BOTTOM3 { - 0x0: MOV(rAX,Iv); - 0x1: MOV(rCX,Iv); - 0x2: MOV(rDX,Iv); - 0x3: MOV(rBX,Iv); - 0x4: MOV(rSP,Iv); - 0x5: MOV(rBP,Iv); - 0x6: MOV(rSI,Iv); - 0x7: MOV(rDI,Iv); - } - } + 0x17: Inst::MOV(B,Iv); 0x18: decode OPCODE_OP_BOTTOM3 { //0x0: group2_Eb_Ib(); 0x0: decode MODRM_REG { diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa index 6adcf866f..a62e911e2 100644 --- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa @@ -317,16 +317,7 @@ 0x6: holder(); 0x7: holder(); } - 0x19: decode OPCODE_OP_BOTTOM3 { - 0x0: bswap_rAx(); - 0x1: bswap_rCx(); - 0x2: bswap_rDx(); - 0x3: bswap_rBx(); - 0x4: bswap_rSP(); - 0x5: bswap_rBP(); - 0x6: bswap_rSI(); - 0x7: bswap_rDI(); - } + 0x19: bswap_B(); 0x1A: decode OPCODE_OP_BOTTOM3 { 0x0: holder(); 0x1: holder(); -- cgit v1.2.3 From c3669b892548ed3e1e8f4016f1e18202c5e7f484 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Fri, 20 Jul 2007 17:02:39 -0700 Subject: Implement the rest of the conditional jump instructions and hook them into the decoder. --HG-- extra : convert_revision : 8d1d6abce29371def560e1c3f31dabb4de01366f --- src/arch/x86/isa/decoder/one_byte_opcodes.isa | 40 ++++++++++++++------------- src/arch/x86/isa/decoder/two_byte_opcodes.isa | 40 ++++++++++++++------------- 2 files changed, 42 insertions(+), 38 deletions(-) (limited to 'src/arch/x86/isa/decoder') diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa index 42404ab91..d1ef8d48e 100644 --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa @@ -214,25 +214,27 @@ 0x6: outs_Dx_Xb(); 0x7: outs_Dx_Xz(); } - 0x0E: decode OPCODE_OP_BOTTOM3 { - 0x0: jo_Jb(); - 0x1: jno_Jb(); - 0x2: jb_Jb(); - 0x3: Inst::JNB(Jb); - 0x4: Inst::JZ(Jb); - 0x5: Inst::JNZ(Jb); - 0x6: Inst::JBE(Jb); - 0x7: Inst::JNBE(Jb); - } - 0x0F: decode OPCODE_OP_BOTTOM3 { - 0x0: js_Jb(); - 0x1: jns_Jb(); - 0x2: jp_Jb(); - 0x3: jnp_Jb(); - 0x4: jl_Jb(); - 0x5: jnl_Jb(); - 0x6: jle_Jb(); - 0x7: Inst::JNLE(Jb); + format Inst { + 0x0E: decode OPCODE_OP_BOTTOM3 { + 0x0: JO(Jb); + 0x1: JNO(Jb); + 0x2: JB(Jb); + 0x3: JNB(Jb); + 0x4: JZ(Jb); + 0x5: JNZ(Jb); + 0x6: JBE(Jb); + 0x7: JNBE(Jb); + } + 0x0F: decode OPCODE_OP_BOTTOM3 { + 0x0: JS(Jb); + 0x1: JNS(Jb); + 0x2: JP(Jb); + 0x3: JNP(Jb); + 0x4: JL(Jb); + 0x5: JNL(Jb); + 0x6: JLE(Jb); + 0x7: JNLE(Jb); + } } 0x10: decode OPCODE_OP_BOTTOM3 { //0x0: group1_Eb_Ib(); diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa index a62e911e2..383d64e5a 100644 --- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa @@ -227,25 +227,27 @@ 0x6: holder(); 0x7: holder(); } - 0x10: decode OPCODE_OP_BOTTOM3 { - 0x0: jo_Jz(); - 0x1: jno_Jz(); - 0x2: jb_Jz(); - 0x3: Inst::JNB(Jz); - 0x4: Inst::JZ(Jz); - 0x5: Inst::JNZ(Jz); - 0x6: Inst::JBE(Jz); - 0x7: Inst::JNBE(Jz); - } - 0x11: decode OPCODE_OP_BOTTOM3 { - 0x0: js_Jz(); - 0x1: jns_Jz(); - 0x2: jp_Jz(); - 0x3: jnp_Jz(); - 0x4: jl_Jz(); - 0x5: jnl_Jz(); - 0x6: jle_Jz(); - 0x7: jnle_Jz(); + format Inst { + 0x10: decode OPCODE_OP_BOTTOM3 { + 0x0: JO(Jz); + 0x1: JNO(Jz); + 0x2: JB(Jz); + 0x3: JNB(Jz); + 0x4: JZ(Jz); + 0x5: JNZ(Jz); + 0x6: JBE(Jz); + 0x7: JNBE(Jz); + } + 0x11: decode OPCODE_OP_BOTTOM3 { + 0x0: JS(Jz); + 0x1: JNS(Jz); + 0x2: JP(Jz); + 0x3: JNP(Jz); + 0x4: JL(Jz); + 0x5: JNL(Jz); + 0x6: JLE(Jz); + 0x7: JNLE(Jz); + } } 0x12: decode OPCODE_OP_BOTTOM3 { 0x0: seto_Eb(); -- cgit v1.2.3 From 9093cb79a1a96867cae677f529a0d4bb19b288af Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Fri, 20 Jul 2007 17:17:11 -0700 Subject: Implement adc and sbb instructions and microops. --HG-- extra : convert_revision : a2d3068c5b487f4fa7bf5c9cebba7753bc390bfa --- src/arch/x86/isa/decoder/one_byte_opcodes.isa | 114 +++++++++++++------------- 1 file changed, 56 insertions(+), 58 deletions(-) (limited to 'src/arch/x86/isa/decoder') diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa index d1ef8d48e..11d8425ce 100644 --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa @@ -88,12 +88,6 @@ [rAl,Ib], [rAx,Iz]); } 0x02: decode OPCODE_OP_BOTTOM3 { - 0x0: adc_Eb_Gb(); - 0x1: adc_Ev_Gv(); - 0x2: adc_Gb_Eb(); - 0x3: adc_Gv_Ev(); - 0x4: adc_Al_Ib(); - 0x5: adc_rAX_Iz(); 0x6: decode MODE_SUBMODE { 0x0: This_should_be_an_illegal_instruction(); default: push_SS(); @@ -102,14 +96,12 @@ 0x0: This_should_be_an_illegal_instruction(); default: pop_SS(); } + default: MultiInst::ADC(OPCODE_OP_BOTTOM3, + [Eb,Gb], [Ev,Gv], + [Gb,Eb], [Gv,Ev], + [rAl,Ib], [rAx,Iz]); } 0x03: decode OPCODE_OP_BOTTOM3 { - 0x0: sbb_Eb_Gb(); - 0x1: sbb_Ev_Gv(); - 0x2: sbb_Gb_Eb(); - 0x3: sbb_Gv_Ev(); - 0x4: sbb_Al_Ib(); - 0x5: sbb_rAX_Iz(); 0x6: decode MODE_SUBMODE { 0x0: This_should_be_an_illegal_instruction(); default: push_DS(); @@ -118,6 +110,10 @@ 0x0: This_should_be_an_illegal_instruction(); default: pop_DS(); } + default: MultiInst::SBB(OPCODE_OP_BOTTOM3, + [Eb,Gb], [Ev,Gv], + [Gb,Eb], [Gv,Ev], + [rAl,Ib], [rAx,Iz]); } 0x04: decode OPCODE_OP_BOTTOM3 { 0x6: M5InternalError::error( @@ -237,52 +233,54 @@ } } 0x10: decode OPCODE_OP_BOTTOM3 { - //0x0: group1_Eb_Ib(); - 0x0: decode MODRM_REG { - 0x0: Inst::ADD(Eb,Ib); - 0x1: Inst::OR(Eb,Ib); - 0x2: adc_Eb_Ib(); - 0x3: sbb_Eb_Ib(); - 0x4: Inst::AND(Eb,Ib); - 0x5: Inst::SUB(Eb,Ib); - 0x6: Inst::XOR(Eb,Ib); - 0x7: Inst::CMP(Eb,Ib); - } - //0x1: group1_Ev_Iz(); - 0x1: decode MODRM_REG { - 0x0: Inst::ADD(Ev,Iz); - 0x1: Inst::OR(Ev,Iz); - 0x2: adc_Ev_Iz(); - 0x3: sbb_Ev_Iz(); - 0x4: Inst::AND(Ev,Iz); - 0x5: Inst::SUB(Ev,Iz); - 0x6: Inst::XOR(Ev,Iz); - 0x7: Inst::CMP(Ev,Iz); - } - 0x2: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); - //default: group1_Eb_Ib(); - default: decode MODRM_REG { - 0x0: Inst::ADD(Eb,Ib); - 0x1: Inst::OR(Eb,Ib); - 0x2: adc_Eb_Ib(); - 0x3: sbb_Eb_Ib(); - 0x4: Inst::AND(Eb,Ib); - 0x5: Inst::SUB(Eb,Ib); - 0x6: Inst::XOR(Eb,Ib); - 0x7: Inst::CMP(Eb,Ib); + format Inst { + //0x0: group1_Eb_Ib(); + 0x0: decode MODRM_REG { + 0x0: ADD(Eb,Ib); + 0x1: OR(Eb,Ib); + 0x2: ADC(Eb,Ib); + 0x3: SBB(Eb,Ib); + 0x4: AND(Eb,Ib); + 0x5: SUB(Eb,Ib); + 0x6: XOR(Eb,Ib); + 0x7: CMP(Eb,Ib); + } + //0x1: group1_Ev_Iz(); + 0x1: decode MODRM_REG { + 0x0: ADD(Ev,Iz); + 0x1: OR(Ev,Iz); + 0x2: ADC(Ev,Iz); + 0x3: SBB(Ev,Iz); + 0x4: AND(Ev,Iz); + 0x5: SUB(Ev,Iz); + 0x6: XOR(Ev,Iz); + 0x7: CMP(Ev,Iz); + } + 0x2: decode MODE_SUBMODE { + 0x0: WarnUnimpl::This_should_be_an_illegal_instruction(); + //default: group1_Eb_Ib(); + default: decode MODRM_REG { + 0x0: ADD(Eb,Ib); + 0x1: OR(Eb,Ib); + 0x2: ADC(Eb,Ib); + 0x3: SBB(Eb,Ib); + 0x4: AND(Eb,Ib); + 0x5: SUB(Eb,Ib); + 0x6: XOR(Eb,Ib); + 0x7: CMP(Eb,Ib); + } + } + //0x3: group1_Ev_Ib(); + 0x3: decode MODRM_REG { + 0x0: ADD(Ev,Ib); + 0x1: OR(Ev,Ib); + 0x2: ADC(Ev,Ib); + 0x3: SBB(Ev,Ib); + 0x4: AND(Ev,Ib); + 0x5: SUB(Ev,Ib); + 0x6: XOR(Ev,Ib); + 0x7: CMP(Ev,Ib); } - } - //0x3: group1_Ev_Ib(); - 0x3: decode MODRM_REG { - 0x0: Inst::ADD(Ev,Ib); - 0x1: Inst::OR(Ev,Ib); - 0x2: adc_Ev_Ib(); - 0x3: sbb_Ev_Ib(); - 0x4: Inst::AND(Ev,Ib); - 0x5: Inst::SUB(Ev,Ib); - 0x6: Inst::XOR(Ev,Ib); - 0x7: Inst::CMP(Ev,Ib); } 0x4: Inst::TEST(Eb,Gb); 0x5: Inst::TEST(Ev,Gv); @@ -492,7 +490,7 @@ 0x4: jmp_Ev(); 0x5: jmp_Mp(); 0x6: push_Ev(); - 0x7: This_should_be_an_illegal_instruction(); + 0x7: WarnUnimpl::This_should_be_an_illegal_instruction(); } } } -- cgit v1.2.3 From 75f6c6a0166c87fd0ac795197355248e6e565ddd Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Fri, 20 Jul 2007 18:27:02 -0700 Subject: Implement UD2 and replace the place holder in the decoder. --HG-- extra : convert_revision : 16d0d2b2ddad8759698fa4aa668c22063307c72b --- src/arch/x86/isa/decoder/one_byte_opcodes.isa | 65 ++++++++++++++------------- src/arch/x86/isa/decoder/two_byte_opcodes.isa | 8 ++-- 2 files changed, 39 insertions(+), 34 deletions(-) (limited to 'src/arch/x86/isa/decoder') diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa index 11d8425ce..2c2d68785 100644 --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa @@ -62,11 +62,11 @@ format WarnUnimpl { 0x00: decode OPCODE_OP_BOTTOM3 { 0x6: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: push_ES(); } 0x7: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: pop_ES(); } default: MultiInst::ADD(OPCODE_OP_BOTTOM3, @@ -76,7 +76,7 @@ } 0x01: decode OPCODE_OP_BOTTOM3 { 0x6: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: push_CS(); } //Any time this is seen, it should generate a two byte opcode @@ -89,11 +89,11 @@ } 0x02: decode OPCODE_OP_BOTTOM3 { 0x6: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: push_SS(); } 0x7: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: pop_SS(); } default: MultiInst::ADC(OPCODE_OP_BOTTOM3, @@ -103,11 +103,11 @@ } 0x03: decode OPCODE_OP_BOTTOM3 { 0x6: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: push_DS(); } 0x7: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: pop_DS(); } default: MultiInst::SBB(OPCODE_OP_BOTTOM3, @@ -119,7 +119,7 @@ 0x6: M5InternalError::error( {{"Tried to execute the ES segment override prefix!"}}); 0x7: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: daa(); } default: MultiInst::AND(OPCODE_OP_BOTTOM3, @@ -140,7 +140,7 @@ 0x6: M5InternalError::error( {{"Tried to execute the SS segment override prefix!"}}); 0x7: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: aaa(); } default: MultiInst::XOR(OPCODE_OP_BOTTOM3, @@ -152,7 +152,7 @@ 0x6: M5InternalError::error( {{"Tried to execute the DS segment override prefix!"}}); 0x7: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: aas(); } default: MultiInst::CMP(OPCODE_OP_BOTTOM3, @@ -176,15 +176,15 @@ } 0x0C: decode OPCODE_OP_BOTTOM3 { 0x0: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: pusha(); } 0x1: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: popa(); } 0x2: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: bound_Gv_Ma(); } 0x3: decode MODE_SUBMODE { @@ -257,7 +257,7 @@ 0x7: CMP(Ev,Iz); } 0x2: decode MODE_SUBMODE { - 0x0: WarnUnimpl::This_should_be_an_illegal_instruction(); + 0x0: UD2(); //default: group1_Eb_Ib(); default: decode MODRM_REG { 0x0: ADD(Eb,Ib); @@ -281,9 +281,9 @@ 0x6: XOR(Ev,Ib); 0x7: CMP(Ev,Ib); } + 0x4: Inst::TEST(Eb,Gb); + 0x5: Inst::TEST(Ev,Gv); } - 0x4: Inst::TEST(Eb,Gb); - 0x5: Inst::TEST(Ev,Gv); 0x6: xchg_Eb_Gb(); 0x7: xchg_Ev_Gv(); } @@ -305,7 +305,7 @@ 0x0: cbw_or_cwde_or_cdqe_rAX(); 0x1: cwd_or_cdq_or_cqo_rAX_rDX(); 0x2: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: call_Ap(); } 0x3: fwait(); //aka wait @@ -314,11 +314,11 @@ //Both of these should be illegal only if CPUID.AHF64=0, //according to sandpile.org 0x6: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: sahf(); } 0x7: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: lahf(); } } @@ -379,11 +379,11 @@ 0x2: ret_near_Iw(); 0x3: Inst::RET_NEAR(); 0x4: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: les_Gz_Mp(); } 0x5: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: lds_Gz_Mp(); } //0x6: group12_Eb_Ib(); @@ -403,7 +403,7 @@ 0x4: int3(); 0x5: int_Ib(); 0x6: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: into(); } 0x7: iret(); @@ -414,15 +414,15 @@ 0x2: group2_Eb_Cl(); 0x3: group2_Ev_Cl(); 0x4: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: aam_Ib(); } 0x5: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: aad_Ib(); } 0x6: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: salc(); } 0x7: xlat(); @@ -449,9 +449,9 @@ } 0x1D: decode OPCODE_OP_BOTTOM3 { 0x0: Inst::CALL_NEAR(Jz); - 0x1: jmp_Jz(); + 0x1: Inst::JMP(Jz); 0x2: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: jmp_Ap(); } 0x3: Inst::JMP(Jb); @@ -480,17 +480,22 @@ 0x3: sti(); 0x4: cld(); 0x5: std(); - 0x6: group4(); + //0x6: group4(); + 0x6: decode MODRM_REG { + 0x0: Inst::INC(Eb); + 0x1: Inst::DEC(Eb); + default: Inst::UD2(); + } //0x7: group5(); 0x7: decode MODRM_REG { 0x0: Inst::INC(Ev); - 0x1: dev_Ev(); + 0x1: Inst::DEC(Ev); 0x2: call_Ev(); 0x3: call_Mp(); 0x4: jmp_Ev(); 0x5: jmp_Mp(); 0x6: push_Ev(); - 0x7: WarnUnimpl::This_should_be_an_illegal_instruction(); + 0x7: Inst::UD2(); } } } diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa index 383d64e5a..e5631d37b 100644 --- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa @@ -80,9 +80,9 @@ 0x01: decode OPCODE_OP_BOTTOM3 { 0x0: invd(); 0x1: wbinvd(); - 0x2: This_should_be_an_illegal_instruction(); - 0x3: UD1(); - 0x4: This_should_be_an_illegal_instruction(); + 0x2: Inst::UD2(); + 0x3: UD2(); + 0x4: Inst::UD2(); 0x5: threednow(); 0x6: threednow(); 0x7: threednow(); @@ -134,7 +134,7 @@ 0x3: rdpmc(); 0x4: sysenter(); 0x5: sysexit(); - 0x6: This_should_be_an_illegal_instruction(); + 0x6: Inst::UD2(); 0x7: getsec(); } 0x07: decode OPCODE_OP_BOTTOM3 { -- cgit v1.2.3 From fc1b7d62b7e8e5cf59956875720dbd1deb68af93 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Fri, 20 Jul 2007 23:16:03 -0700 Subject: Fixed the distinction between far and near versions of jmp, call and ret. Implemented some shifts, rotates, and pushes. --HG-- extra : convert_revision : fcb06189ff213e82da16ac43231feb308cb3a285 --- src/arch/x86/isa/decoder/one_byte_opcodes.isa | 54 ++++++++++++++------------- 1 file changed, 28 insertions(+), 26 deletions(-) (limited to 'src/arch/x86/isa/decoder') diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa index 2c2d68785..329a03f40 100644 --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa @@ -306,7 +306,7 @@ 0x1: cwd_or_cdq_or_cqo_rAX_rDX(); 0x2: decode MODE_SUBMODE { 0x0: Inst::UD2(); - default: call_Ap(); + default: call_far_Ap(); } 0x3: fwait(); //aka wait 0x4: pushf_Fv(); @@ -356,25 +356,25 @@ 0x18: decode OPCODE_OP_BOTTOM3 { //0x0: group2_Eb_Ib(); 0x0: decode MODRM_REG { - 0x0: rol_Eb_Ib(); - 0x1: ror_Eb_Ib(); + 0x0: Inst::ROL(Eb,Ib); + 0x1: Inst::ROR(Eb,Ib); 0x2: rcl_Eb_Ib(); 0x3: rcr_Eb_Ib(); 0x4: Inst::SAL(Eb,Ib); - 0x5: shr_Eb_Ib(); + 0x5: Inst::SHR(Eb,Ib); 0x6: Inst::SAL(Eb,Ib); - 0x7: sar_Eb_Ib(); + 0x7: Inst::SAR(Eb,Ib); } //0x1: group2_Ev_Ib(); 0x1: decode MODRM_REG { - 0x0: rol_Ev_Ib(); - 0x1: ror_Ev_Ib(); + 0x0: Inst::ROL(Ev,Ib); + 0x1: Inst::ROR(Ev,Ib); 0x2: rcl_Ev_Ib(); 0x3: rcr_Ev_Ib(); 0x4: Inst::SAL(Ev,Ib); - 0x5: shr_Ev_Ib(); + 0x5: Inst::SHR(Ev,Ib); 0x6: Inst::SAL(Ev,Ib); - 0x7: sar_Ev_Ib(); + 0x7: Inst::SAR(Ev,Ib); } 0x2: ret_near_Iw(); 0x3: Inst::RET_NEAR(); @@ -452,7 +452,7 @@ 0x1: Inst::JMP(Jz); 0x2: decode MODE_SUBMODE { 0x0: Inst::UD2(); - default: jmp_Ap(); + default: jmp_far_Ap(); } 0x3: Inst::JMP(Jb); 0x4: in_Al_Dx(); @@ -480,22 +480,24 @@ 0x3: sti(); 0x4: cld(); 0x5: std(); - //0x6: group4(); - 0x6: decode MODRM_REG { - 0x0: Inst::INC(Eb); - 0x1: Inst::DEC(Eb); - default: Inst::UD2(); - } - //0x7: group5(); - 0x7: decode MODRM_REG { - 0x0: Inst::INC(Ev); - 0x1: Inst::DEC(Ev); - 0x2: call_Ev(); - 0x3: call_Mp(); - 0x4: jmp_Ev(); - 0x5: jmp_Mp(); - 0x6: push_Ev(); - 0x7: Inst::UD2(); + format Inst { + //0x6: group4(); + 0x6: decode MODRM_REG { + 0x0: INC(Eb); + 0x1: DEC(Eb); + default: UD2(); + } + //0x7: group5(); + 0x7: decode MODRM_REG { + 0x0: INC(Ev); + 0x1: DEC(Ev); + 0x2: CALL_NEAR(Ev); + 0x3: WarnUnimpl::call_far_Mp(); + 0x4: JMP(Ev); + 0x5: WarnUnimpl::jmp_far_Mp(); + 0x6: PUSH(Ev); + 0x7: UD2(); + } } } } -- cgit v1.2.3 From f7ff068b3044706a874459afac859a38307828c9 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Sat, 21 Jul 2007 19:29:39 -0700 Subject: Implemented and hooked in xchg, rotate with carry, and ret instructions --HG-- extra : convert_revision : a8e67b0ab4072308f01e0df7f7ee05b31f605a35 --- src/arch/x86/isa/decoder/one_byte_opcodes.isa | 109 ++++++++++++-------------- 1 file changed, 52 insertions(+), 57 deletions(-) (limited to 'src/arch/x86/isa/decoder') diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa index 329a03f40..b28f2029c 100644 --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa @@ -232,8 +232,8 @@ 0x7: JNLE(Jb); } } - 0x10: decode OPCODE_OP_BOTTOM3 { - format Inst { + format Inst { + 0x10: decode OPCODE_OP_BOTTOM3 { //0x0: group1_Eb_Ib(); 0x0: decode MODRM_REG { 0x0: ADD(Eb,Ib); @@ -281,11 +281,11 @@ 0x6: XOR(Ev,Ib); 0x7: CMP(Ev,Ib); } - 0x4: Inst::TEST(Eb,Gb); - 0x5: Inst::TEST(Ev,Gv); + 0x4: TEST(Eb,Gb); + 0x5: TEST(Ev,Gv); + 0x6: XCHG(Eb,Gb); + 0x7: XCHG(Ev,Gv); } - 0x6: xchg_Eb_Gb(); - 0x7: xchg_Ev_Gv(); } 0x11: decode OPCODE_OP_BOTTOM3 { 0x0: Inst::MOV(Eb,Gb); @@ -342,57 +342,52 @@ 0x6: scas_Yb_Al(); 0x7: scas_Yv_rAX(); } - 0x16: decode OPCODE_OP_BOTTOM3 { - 0x0: mov_Al_Ib(); - 0x1: mov_Cl_Ib(); - 0x2: mov_Dl_Ib(); - 0x3: mov_Bl_Ib(); - 0x4: mov_Ah_Ib(); - 0x5: mov_Ch_Ib(); - 0x6: mov_Dh_Ib(); - 0x7: mov_Bh_Ib(); - } - 0x17: Inst::MOV(B,Iv); - 0x18: decode OPCODE_OP_BOTTOM3 { - //0x0: group2_Eb_Ib(); - 0x0: decode MODRM_REG { - 0x0: Inst::ROL(Eb,Ib); - 0x1: Inst::ROR(Eb,Ib); - 0x2: rcl_Eb_Ib(); - 0x3: rcr_Eb_Ib(); - 0x4: Inst::SAL(Eb,Ib); - 0x5: Inst::SHR(Eb,Ib); - 0x6: Inst::SAL(Eb,Ib); - 0x7: Inst::SAR(Eb,Ib); - } - //0x1: group2_Ev_Ib(); - 0x1: decode MODRM_REG { - 0x0: Inst::ROL(Ev,Ib); - 0x1: Inst::ROR(Ev,Ib); - 0x2: rcl_Ev_Ib(); - 0x3: rcr_Ev_Ib(); - 0x4: Inst::SAL(Ev,Ib); - 0x5: Inst::SHR(Ev,Ib); - 0x6: Inst::SAL(Ev,Ib); - 0x7: Inst::SAR(Ev,Ib); - } - 0x2: ret_near_Iw(); - 0x3: Inst::RET_NEAR(); - 0x4: decode MODE_SUBMODE { - 0x0: Inst::UD2(); - default: les_Gz_Mp(); - } - 0x5: decode MODE_SUBMODE { - 0x0: Inst::UD2(); - default: lds_Gz_Mp(); - } - //0x6: group12_Eb_Ib(); - 0x6: decode MODRM_REG { - 0x0: Inst::MOV(Eb,Ib); - } - //0x7: group12_Ev_Iz(); - 0x7: decode MODRM_REG { - 0x0: Inst::MOV(Ev,Iz); + format Inst { + 0x16: MOV(B,Ib); + 0x17: MOV(B,Iv); + 0x18: decode OPCODE_OP_BOTTOM3 { + //0x0: group2_Eb_Ib(); + 0x0: decode MODRM_REG { + 0x0: ROL(Eb,Ib); + 0x1: ROR(Eb,Ib); + 0x2: RCL(Eb,Ib); + 0x3: RCR(Eb,Ib); + 0x4: SAL(Eb,Ib); + 0x5: SHR(Eb,Ib); + 0x6: SAL(Eb,Ib); + 0x7: SAR(Eb,Ib); + } + //0x1: group2_Ev_Ib(); + 0x1: decode MODRM_REG { + 0x0: ROL(Ev,Ib); + 0x1: ROR(Ev,Ib); + 0x2: RCL(Ev,Ib); + 0x3: RCR(Ev,Ib); + 0x4: SAL(Ev,Ib); + 0x5: SHR(Ev,Ib); + 0x6: SAL(Ev,Ib); + 0x7: SAR(Ev,Ib); + } + 0x2: RET_NEAR(Iw); + 0x3: RET_NEAR(); + 0x4: decode MODE_SUBMODE { + 0x0: UD2(); + default: WarnUnimpl::les_Gz_Mp(); + } + 0x5: decode MODE_SUBMODE { + 0x0: UD2(); + default: WarnUnimpl::lds_Gz_Mp(); + } + //0x6: group12_Eb_Ib(); + 0x6: decode MODRM_REG { + 0x0: MOV(Eb,Ib); + default: UD2(); + } + //0x7: group12_Ev_Iz(); + 0x7: decode MODRM_REG { + 0x0: MOV(Ev,Iz); + default: UD2(); + } } } 0x19: decode OPCODE_OP_BOTTOM3 { -- cgit v1.2.3