From 2eae11be6499effbcf33e4f3ea747a7280adf86c Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Fri, 22 Oct 2010 00:24:15 -0700 Subject: X86: Make nop a regular, non-microcoded instruction. Code in the CPUs that need a nop to carry a fault can't easily deal with a microcoded nop. This instruction format provides for one that isn't. --HG-- rename : src/arch/x86/isa/formats/syscall.isa => src/arch/x86/isa/formats/nop.isa --- src/arch/x86/isa/decoder/one_byte_opcodes.isa | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/arch/x86/isa/decoder') diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa index 80f603503..213ddf65a 100644 --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa @@ -296,7 +296,7 @@ } } 0x12: decode OPCODE_OP_BOTTOM3 { - 0x0: NOP(); //XXX repe makes this a "pause" + 0x0: NopInst::NOP(); //XXX repe makes this a "pause" default: XCHG(Bv,rAv); } 0x13: decode OPCODE_OP_BOTTOM3 { -- cgit v1.2.3