From 60c2d98fc088dea76f0cd67588d4efb2ca557136 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Tue, 22 Jan 2008 00:10:33 -0500 Subject: X86: Implement and attach the BSR and BSF instructions. --HG-- extra : convert_revision : be7e11980092e5d1baff0e05d4ec910305966908 --- src/arch/x86/isa/decoder/two_byte_opcodes.isa | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/arch/x86/isa/decoder') diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa index d4f25775f..d90df6f45 100644 --- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa @@ -766,8 +766,8 @@ } 0x3: BTC(Ev,Gv); } - 0x4: bsf_Gv_Ev(); - 0x5: bsr_Gv_Ev(); + 0x4: Inst::BSF(Gv,Ev); + 0x5: Inst::BSR(Gv,Ev); //The size of the second operand in these instructions should //really be "b" or "w", but it's set to v in order to have a //consistent register size. This shouldn't affect behavior. -- cgit v1.2.3