From 7fcc9d2106e1057f95867a5691c01b2c17278b31 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Thu, 29 Mar 2007 17:57:19 +0000 Subject: Made the MultiOp format do a little more. It now sets up single microop instructions to return an instance of the right class. The code to decode register numbers and generate loads and stores still needs to be added. Also, a syntax for specifying operands as sources, destinations, or both needs to be established. Multipl microop instructions are also not handled, pending real macroop generation support. --HG-- extra : convert_revision : 1a0a4b36afce8255e23e3cdd7a85c1392dda5f72 --- src/arch/x86/isa/decoder/one_byte_opcodes.isa | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/arch/x86/isa/decoder') diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa index 0f030299a..b4aeece07 100644 --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa @@ -64,7 +64,7 @@ 0x6: push_ES(); 0x7: pop_ES(); default: MultiOp::add( - {{Add op0, op0, op1}}, + {{Add %0 %0 %1}}, OPCODE_OP_BOTTOM3, [[Eb,Gb],[Ev,Gv], [Gb,Eb],[Gv,Ev], -- cgit v1.2.3