From 8501a90f59c73896b4eea6d7ce8f1d1cc8685d53 Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Thu, 12 Jun 2008 00:39:10 -0400
Subject: X86: Add in some support for the tsc register.

---
 src/arch/x86/isa/decoder/two_byte_opcodes.isa | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/arch/x86/isa/decoder')

diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
index 8135a1fdb..e2d968c17 100644
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
@@ -317,7 +317,7 @@
             }
             0x06: decode OPCODE_OP_BOTTOM3 {
                 0x0: Inst::WRMSR();
-                0x1: rdtsc();
+                0x1: Inst::RDTSC();
                 0x2: Inst::RDMSR();
                 0x3: rdpmc();
                 0x4: sysenter();
-- 
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