From a2d9aae3c3dae1ffdd62eb91d2318758772684dc Mon Sep 17 00:00:00 2001
From: David Hashe <david.hashe@amd.com>
Date: Mon, 20 Jul 2015 09:15:18 -0500
Subject: x86: x86 instruction-implementation bug fixes

Added explicit data sizes and an opcode type for correct execution.
---
 src/arch/x86/isa/decoder/two_byte_opcodes.isa | 6 ++++++
 1 file changed, 6 insertions(+)

(limited to 'src/arch/x86/isa/decoder')

diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
index dfc328c4b..0ba7434e8 100644
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
@@ -1,4 +1,5 @@
 // Copyright (c) 2007-2008 The Hewlett-Packard Development Company
+// Copyright (c) 2012-2013 AMD
 // All rights reserved.
 //
 // The license below extends only to copyright in the software and shall
@@ -361,6 +362,11 @@
                     0x3: MOV(Dd,Rd);
                     default: UD2();
                 }
+                // operand size (0x66)
+                0x1: decode OPCODE_OP_BOTTOM3 {
+                    0x0: MOV(Rd,Cd);
+                    0x2: MOV(Cd,Rd);
+                }
                 default: UD2();
             }
             0x05: decode LEGACY_DECODEVAL {
-- 
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