From cfadef74d1d7ce47d0bd30a14a509a15a354849a Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Thu, 19 Jul 2007 15:15:47 -0700 Subject: x86 fixes Make the emulation environment consider the rex prefix. Implement and hook in forms of j, jmp, cmp, syscall, movzx Added a format for an instruction to carry a call to the SE mode syscalls system Made memory instructions which refer to the rip do so directly Made the operand size overridable in the microassembly Made the "ext" field of register operations 16 bits to hold a sparse encoding of flags to set or conditions to predicate on Added an explicit "rax" operand for the syscall format Implemented syscall returns. --HG-- extra : convert_revision : ae84bd8c6a1d400906e17e8b8c4185f2ebd4c5f2 --- src/arch/x86/isa/insts/compare_and_test/test.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/arch/x86/isa/insts/compare_and_test/test.py') diff --git a/src/arch/x86/isa/insts/compare_and_test/test.py b/src/arch/x86/isa/insts/compare_and_test/test.py index 1d2364f0f..8da33899a 100644 --- a/src/arch/x86/isa/insts/compare_and_test/test.py +++ b/src/arch/x86/isa/insts/compare_and_test/test.py @@ -63,7 +63,7 @@ def macroop TEST_M_R def macroop TEST_P_R { rdip t7 - ld t1, ds, [scale, index, base], disp + ld t1, ds, [0, t0, t7], disp and t0, t1, reg, flags=(SF, ZF, PF) }; @@ -82,7 +82,7 @@ def macroop TEST_M_I def macroop TEST_P_I { rdip t7 - ld t1, ds, [scale, index, base], disp + ld t1, ds, [0, t0, t7], disp limm t2, imm and t0, t1, t2, flags=(SF, ZF, PF) }; -- cgit v1.2.3