From 5810ab121c39f041aa6728696bc19e2e963eef90 Mon Sep 17 00:00:00 2001 From: Tim Harris Date: Mon, 7 Feb 2011 15:05:28 -0800 Subject: X86: Read the LDT/GDT at CPL0 when executing an iret. During iret access LDT/GDT at CPL0 rather than after transition to user mode (if I'm reading the Intel IA-64 architecture spec correctly, the contents of the descriptor table are read before the CPL is updated). --- .../general_purpose/control_transfer/interrupts_and_exceptions.py | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/arch/x86/isa/insts/general_purpose/control_transfer') diff --git a/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py b/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py index f8bafa540..19a344008 100644 --- a/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py +++ b/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py @@ -102,10 +102,10 @@ protToVirtFallThrough: andi t6, t2, 0xF8, dataSize=8 andi t0, t2, 0x4, flags=(EZF,), dataSize=2 br label("globalCSDescriptor"), flags=(CEZF,) - ld t8, tsl, [1, t0, t6], dataSize=8 + ld t8, tsl, [1, t0, t6], dataSize=8, atCPL0=True br label("processCSDescriptor") globalCSDescriptor: - ld t8, tsg, [1, t0, t6], dataSize=8 + ld t8, tsg, [1, t0, t6], dataSize=8, atCPL0=True processCSDescriptor: chks t2, t6, dataSize=8 @@ -159,10 +159,10 @@ doPopStackStuff: andi t7, t9, 0xF8, dataSize=8 andi t0, t9, 0x4, flags=(EZF,), dataSize=2 br label("globalSSDescriptor"), flags=(CEZF,) - ld t7, tsl, [1, t0, t7], dataSize=8 + ld t7, tsl, [1, t0, t7], dataSize=8, atCPL0=True br label("processSSDescriptor") globalSSDescriptor: - ld t7, tsg, [1, t0, t7], dataSize=8 + ld t7, tsg, [1, t0, t7], dataSize=8, atCPL0=True processSSDescriptor: chks t9, t7, dataSize=8 -- cgit v1.2.3