From d43eb42d00a587405a512396c6524be95d5a6311 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Mon, 23 Aug 2010 09:44:19 -0700 Subject: X86: Mark serializing macroops and regular instructions as such. --- .../general_purpose/control_transfer/interrupts_and_exceptions.py | 2 ++ src/arch/x86/isa/insts/general_purpose/data_transfer/move.py | 3 +++ 2 files changed, 5 insertions(+) (limited to 'src/arch/x86/isa/insts/general_purpose') diff --git a/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py b/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py index 925f4bef3..f8bafa540 100644 --- a/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py +++ b/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py @@ -37,10 +37,12 @@ microcode = ''' def macroop IRET_REAL { + .serializing panic "Real mode iret isn't implemented!" }; def macroop IRET_PROT { + .serializing .adjust_env oszIn64Override # Check for a nested task. This isn't supported at the moment. diff --git a/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py b/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py index a43325288..3f5c2d303 100644 --- a/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py +++ b/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py @@ -174,16 +174,19 @@ def macroop MOVZX_W_R_P { }; def macroop MOV_C_R { + .serializing .adjust_env maxOsz wrcr reg, regm }; def macroop MOV_R_C { + .serializing .adjust_env maxOsz rdcr reg, regm }; def macroop MOV_D_R { + .serializing .adjust_env maxOsz wrdr reg, regm }; -- cgit v1.2.3