From cf2fc2613d7b80f72e886fb89ab7e347889994fd Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Mon, 17 Aug 2009 20:15:16 -0700 Subject: X86: Implement the media shifts that operate on 64 bits or less at a time. --- .../simd64/integer/shift/left_logical_shift.py | 59 ++++++++++++++++++++-- .../simd64/integer/shift/right_arithmetic_shift.py | 39 +++++++++++++- .../simd64/integer/shift/right_logical_shift.py | 59 ++++++++++++++++++++-- 3 files changed, 149 insertions(+), 8 deletions(-) (limited to 'src/arch/x86/isa/insts/simd64') diff --git a/src/arch/x86/isa/insts/simd64/integer/shift/left_logical_shift.py b/src/arch/x86/isa/insts/simd64/integer/shift/left_logical_shift.py index 4687cab8d..011337ef7 100644 --- a/src/arch/x86/isa/insts/simd64/integer/shift/left_logical_shift.py +++ b/src/arch/x86/isa/insts/simd64/integer/shift/left_logical_shift.py @@ -54,7 +54,60 @@ # Authors: Gabe Black microcode = ''' -# PSLLW -# PSLLD -# PSLLQ +def macroop PSLLW_MMX_MMX { + msll mmx, mmx, mmxm, size=2, ext=0 +}; + +def macroop PSLLW_MMX_M { + ldfp ufp1, seg, sib, disp, dataSize=8 + msll mmx, mmx, ufp1, size=2, ext=0 +}; + +def macroop PSLLW_MMX_P { + rdip t7 + ldfp ufp1, seg, riprel, disp, dataSize=8 + msll mmx, mmx, ufp1, size=2, ext=0 +}; + +def macroop PSLLW_MMX_I { + mslli mmx, mmx, imm, size=2, ext=0 +}; + +def macroop PSLLD_MMX_MMX { + msll mmx, mmx, mmxm, size=4, ext=0 +}; + +def macroop PSLLD_MMX_M { + ldfp ufp1, seg, sib, disp, dataSize=8 + msll mmx, mmx, ufp1, size=4, ext=0 +}; + +def macroop PSLLD_MMX_P { + rdip t7 + ldfp ufp1, seg, riprel, disp, dataSize=8 + msll mmx, mmx, ufp1, size=4, ext=0 +}; + +def macroop PSLLD_MMX_I { + mslli mmx, mmx, imm, size=4, ext=0 +}; + +def macroop PSLLQ_MMX_MMX { + msll mmx, mmx, mmxm, size=8, ext=0 +}; + +def macroop PSLLQ_MMX_M { + ldfp ufp1, seg, sib, disp, dataSize=8 + msll mmx, mmx, ufp1, size=8, ext=0 +}; + +def macroop PSLLQ_MMX_P { + rdip t7 + ldfp ufp1, seg, riprel, disp, dataSize=8 + msll mmx, mmx, ufp1, size=8, ext=0 +}; + +def macroop PSLLQ_MMX_I { + mslli mmx, mmx, imm, size=8, ext=0 +}; ''' diff --git a/src/arch/x86/isa/insts/simd64/integer/shift/right_arithmetic_shift.py b/src/arch/x86/isa/insts/simd64/integer/shift/right_arithmetic_shift.py index 63750e292..951b3ea9f 100644 --- a/src/arch/x86/isa/insts/simd64/integer/shift/right_arithmetic_shift.py +++ b/src/arch/x86/isa/insts/simd64/integer/shift/right_arithmetic_shift.py @@ -54,6 +54,41 @@ # Authors: Gabe Black microcode = ''' -# PSRAW -# PSRAD +def macroop PSRAW_MMX_MMX { + msra mmx, mmx, mmxm, size=2, ext=0 +}; + +def macroop PSRAW_MMX_M { + ldfp ufp1, seg, sib, disp, dataSize=8 + msra mmx, mmx, ufp1, size=2, ext=0 +}; + +def macroop PSRAW_MMX_P { + rdip t7 + ldfp ufp1, seg, riprel, disp, dataSize=8 + msra mmx, mmx, ufp1, size=2, ext=0 +}; + +def macroop PSRAW_MMX_I { + msrai mmx, mmx, imm, size=2, ext=0 +}; + +def macroop PSRAD_MMX_MMX { + msra mmx, mmx, mmxm, size=4, ext=0 +}; + +def macroop PSRAD_MMX_M { + ldfp ufp1, seg, sib, disp, dataSize=8 + msra mmx, mmx, ufp1, size=4, ext=0 +}; + +def macroop PSRAD_MMX_P { + rdip t7 + ldfp ufp1, seg, riprel, disp, dataSize=8 + msra mmx, mmx, ufp1, size=4, ext=0 +}; + +def macroop PSRAD_MMX_I { + msrai mmx, mmx, imm, size=4, ext=0 +}; ''' diff --git a/src/arch/x86/isa/insts/simd64/integer/shift/right_logical_shift.py b/src/arch/x86/isa/insts/simd64/integer/shift/right_logical_shift.py index 1f870dc32..dc6182de7 100644 --- a/src/arch/x86/isa/insts/simd64/integer/shift/right_logical_shift.py +++ b/src/arch/x86/isa/insts/simd64/integer/shift/right_logical_shift.py @@ -54,7 +54,60 @@ # Authors: Gabe Black microcode = ''' -# PSRLW -# PSRLD -# PSRLQ +def macroop PSRLW_MMX_MMX { + msrl mmx, mmx, mmxm, size=2, ext=0 +}; + +def macroop PSRLW_MMX_M { + ldfp ufp1, seg, sib, disp, dataSize=8 + msrl mmx, mmx, ufp1, size=2, ext=0 +}; + +def macroop PSRLW_MMX_P { + rdip t7 + ldfp ufp1, seg, riprel, disp, dataSize=8 + msrl mmx, mmx, ufp1, size=2, ext=0 +}; + +def macroop PSRLW_MMX_I { + msrli mmx, mmx, imm, size=2, ext=0 +}; + +def macroop PSRLD_MMX_MMX { + msrl mmx, mmx, mmxm, size=4, ext=0 +}; + +def macroop PSRLD_MMX_M { + ldfp ufp1, seg, sib, disp, dataSize=8 + msrl mmx, mmx, ufp1, size=4, ext=0 +}; + +def macroop PSRLD_MMX_P { + rdip t7 + ldfp ufp1, seg, riprel, disp, dataSize=8 + msrl mmx, mmx, ufp1, size=4, ext=0 +}; + +def macroop PSRLD_MMX_I { + msrli mmx, mmx, imm, size=4, ext=0 +}; + +def macroop PSRLQ_MMX_MMX { + msrl mmx, mmx, mmxm, size=8, ext=0 +}; + +def macroop PSRLQ_MMX_M { + ldfp ufp1, seg, sib, disp, dataSize=8 + msrl mmx, mmx, ufp1, size=8, ext=0 +}; + +def macroop PSRLQ_MMX_P { + rdip t7 + ldfp ufp1, seg, riprel, disp, dataSize=8 + msrl mmx, mmx, ufp1, size=8, ext=0 +}; + +def macroop PSRLQ_MMX_I { + msrli mmx, mmx, imm, size=8, ext=0 +}; ''' -- cgit v1.2.3