From 3cd95a2748ebed72cedd64f7f4c945eef6e2ccf7 Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Wed, 19 Sep 2007 18:28:34 -0700
Subject: X86: Implement the fld, fst, and fstp instructions.

--HG--
extra : convert_revision : 7dd274bdc3c34839c17d9012a745d7c95dfcfdd8
---
 .../load_or_store_floating_point.py                | 35 ++++++++++++++++++++--
 1 file changed, 32 insertions(+), 3 deletions(-)

(limited to 'src/arch/x86/isa/insts')

diff --git a/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/load_or_store_floating_point.py b/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/load_or_store_floating_point.py
index 3507347fe..37574da34 100644
--- a/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/load_or_store_floating_point.py
+++ b/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/load_or_store_floating_point.py
@@ -54,7 +54,36 @@
 # Authors: Gabe Black
 
 microcode = '''
-# FLD
-# FST
-# FSTP
+def macroop FLD_M {
+    ldfp ufp1, seg, sib, disp
+    movfp st(1), ufp1, spm=-1
+};
+
+def macroop FLD_P {
+    rdip t7
+    ldfp ufp1, seg, riprel, disp
+    movfp st(1), ufp1, spm=-1
+};
+
+def macroop FST_M {
+    movfp st(0), ufp1
+    stfp ufp1, seg, sib, disp
+};
+
+def macroop FST_P {
+    movfp st(0), ufp1
+    rdip t7
+    stfp ufp1, seg, riprel, disp
+};
+
+def macroop FSTP_M {
+    movfp st(0), ufp1, spm=1
+    stfp ufp1, seg, sib, disp
+};
+
+def macroop FSTP_P {
+    movfp st(0), ufp1, spm=1
+    rdip t7
+    stfp ufp1, seg, riprel, disp
+};
 '''
-- 
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