From 8501a90f59c73896b4eea6d7ce8f1d1cc8685d53 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Thu, 12 Jun 2008 00:39:10 -0400 Subject: X86: Add in some support for the tsc register. --- src/arch/x86/isa/insts/system/msrs.py | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'src/arch/x86/isa/insts') diff --git a/src/arch/x86/isa/insts/system/msrs.py b/src/arch/x86/isa/insts/system/msrs.py index 1acb4c792..461ed1054 100644 --- a/src/arch/x86/isa/insts/system/msrs.py +++ b/src/arch/x86/isa/insts/system/msrs.py @@ -99,4 +99,12 @@ def macroop WRMSR or t2, t2, t3, dataSize=8 st t2, intseg, [8, t1, rcx], dataSize=8, addressSize=4 }; + +def macroop RDTSC +{ + rdtsc t1 + mov rax, rax, t1, dataSize=4 + srli t1, t1, 32, dataSize=8 + mov rdx, rdx, t1, dataSize=4 +}; ''' -- cgit v1.2.3