From a68ddf685c739220d09fdc44000dd217d0707f8e Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Wed, 20 Jun 2007 15:02:50 +0000
Subject: Make memory instructions work better, add more macroop
 implementations, add an lea microop, move EmulEnv into it's own .cc and .hh.

--HG--
extra : convert_revision : 1212b8463eab1c1dcba7182c487d1e9184cf9bea
---
 .../x86/isa/insts/arithmetic/add_and_subtract.py   | 14 +++++++++-
 src/arch/x86/isa/insts/compare_and_test/test.py    | 32 ++++++++++++++++++----
 src/arch/x86/isa/insts/data_transfer/move.py       |  4 +--
 src/arch/x86/isa/insts/load_effective_address.py   | 10 +++----
 4 files changed, 47 insertions(+), 13 deletions(-)

(limited to 'src/arch/x86/isa/insts')

diff --git a/src/arch/x86/isa/insts/arithmetic/add_and_subtract.py b/src/arch/x86/isa/insts/arithmetic/add_and_subtract.py
index 283152f30..349c2bb46 100644
--- a/src/arch/x86/isa/insts/arithmetic/add_and_subtract.py
+++ b/src/arch/x86/isa/insts/arithmetic/add_and_subtract.py
@@ -53,7 +53,19 @@
 #
 # Authors: Gabe Black
 
-microcode = ""
+microcode = '''
+def macroop SUB_R_I
+{
+    subi "env.reg", "env.reg", "IMMEDIATE"
+};
+
+def macroop SUB_M_I
+{
+    #Load into t1
+    subi "NUM_INTREGS+1", "NUM_INTREGS+1", "IMMEDIATE"
+    #save from t1
+};
+'''
 #let {{
 #    class ADC(Inst):
 #	"Adc ^0 ^0 ^1"
diff --git a/src/arch/x86/isa/insts/compare_and_test/test.py b/src/arch/x86/isa/insts/compare_and_test/test.py
index b4d1cf9b8..36abab5d1 100644
--- a/src/arch/x86/isa/insts/compare_and_test/test.py
+++ b/src/arch/x86/isa/insts/compare_and_test/test.py
@@ -53,8 +53,30 @@
 #
 # Authors: Gabe Black
 
-microcode = ""
-#let {{
-#    class TEST(Inst):
-#	"GenFault ${new UnimpInstFault}"
-#}};
+microcode = '''
+def macroop TEST_M_R
+{
+    ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \
+        "DISPLACEMENT"
+    and "NUM_INTREGS", "NUM_INTREGS+1", "env.reg"
+};
+
+def macroop TEST_R_R
+{
+    and "NUM_INTREGS", "env.reg", "env.regm"
+};
+
+def macroop TEST_M_I
+{
+    ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \
+        "DISPLACEMENT"
+    limm "NUM_INTREGS+2", "IMMEDIATE"
+    and "NUM_INTREGS", "NUM_INTREGS+1", "NUM_INTREGS+2"
+};
+
+def macroop TEST_R_I
+{
+    limm "NUM_INTREGS+1", "IMMEDIATE"
+    and "NUM_INTREGS", "env.reg", "NUM_INTREGS+1"
+};
+'''
diff --git a/src/arch/x86/isa/insts/data_transfer/move.py b/src/arch/x86/isa/insts/data_transfer/move.py
index 1464e6379..c674329ea 100644
--- a/src/arch/x86/isa/insts/data_transfer/move.py
+++ b/src/arch/x86/isa/insts/data_transfer/move.py
@@ -59,11 +59,11 @@ def macroop MOV_R_R {
 };
 
 def macroop MOV_M_R {
-    #Do a store to put the register operand into memory
+    st "env.reg", 3, ["env.scale", "env.index", "env.base"], "DISPLACEMENT"
 };
 
 def macroop MOV_R_M {
-    #Do a load to fill the register operand from memory
+    ld "env.reg", 3, ["env.scale", "env.index", "env.base"], "DISPLACEMENT"
 };
 
 def macroop MOV_R_I {
diff --git a/src/arch/x86/isa/insts/load_effective_address.py b/src/arch/x86/isa/insts/load_effective_address.py
index dab6960b1..ac32638a0 100644
--- a/src/arch/x86/isa/insts/load_effective_address.py
+++ b/src/arch/x86/isa/insts/load_effective_address.py
@@ -53,8 +53,8 @@
 #
 # Authors: Gabe Black
 
-microcode = ""
-#let {{
-#    class LEA(Inst):
-#	"GenFault ${new UnimpInstFault}"
-#}};
+microcode = '''
+def macroop LEA_R_M {
+    lea "env.reg", 3, ["env.scale", "env.index", "env.base"], "DISPLACEMENT"
+};
+'''
-- 
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