From dc8018a5c3482008232e6faaa2d96cf20aed7485 Mon Sep 17 00:00:00 2001
From: Steve Reinhardt <steve.reinhardt@amd.com>
Date: Sat, 6 Feb 2016 17:21:18 -0800
Subject: style: remove trailing whitespace

Result of running 'hg m5style --skip-all --fix-white -a'.
---
 src/arch/x86/isa/insts/general_purpose/system_calls.py      | 4 ++--
 src/arch/x86/isa/insts/romutil.py                           | 8 ++++----
 src/arch/x86/isa/insts/simd64/integer/data_transfer/move.py | 2 +-
 3 files changed, 7 insertions(+), 7 deletions(-)

(limited to 'src/arch/x86/isa/insts')

diff --git a/src/arch/x86/isa/insts/general_purpose/system_calls.py b/src/arch/x86/isa/insts/general_purpose/system_calls.py
index d6f1a39bf..59519c0ae 100644
--- a/src/arch/x86/isa/insts/general_purpose/system_calls.py
+++ b/src/arch/x86/isa/insts/general_purpose/system_calls.py
@@ -43,7 +43,7 @@ def macroop SYSCALL_64
 
     # Save the next RIP.
     rdip rcx
-    
+
     # Stick rflags with RF masked into r11.
     rflags t2
     limm t3, "~RFBit", dataSize=8
@@ -96,7 +96,7 @@ def macroop SYSCALL_COMPAT
 
     # Save the next RIP.
     rdip rcx
-    
+
     # Stick rflags with RF masked into r11.
     rflags t2
     limm t3, "~RFBit", dataSize=8
diff --git a/src/arch/x86/isa/insts/romutil.py b/src/arch/x86/isa/insts/romutil.py
index 10653e1cc..ed43171bb 100644
--- a/src/arch/x86/isa/insts/romutil.py
+++ b/src/arch/x86/isa/insts/romutil.py
@@ -66,7 +66,7 @@ def rom
     wrdh t9, t4, t2, dataSize=8
 
 
-    # 
+    #
     # Figure out where the stack should be
     #
 
@@ -74,7 +74,7 @@ def rom
     rdsel t11, ss
 
     # Check if we're changing privelege level. At this point we can assume
-    # we're going to a DPL that's less than or equal to the CPL. 
+    # we're going to a DPL that's less than or equal to the CPL.
     rdattr t10, hs, dataSize=8
     andi t10, t10, 3, dataSize=8
     rdattr t5, cs, dataSize=8
@@ -139,7 +139,7 @@ def rom
     # Build up the interrupt stack frame
     #
 
-    
+
     # Write out the contents of memory
     %(errorCodeCode)s
     st t7, hs, [1, t0, t6], %(errorCodeSize)d, dataSize=8, addressSize=8
@@ -173,7 +173,7 @@ def rom
 
     # Put the results into rflags
     wrflags t6, t10
-    
+
     eret
 };
 '''
diff --git a/src/arch/x86/isa/insts/simd64/integer/data_transfer/move.py b/src/arch/x86/isa/insts/simd64/integer/data_transfer/move.py
index 027747b52..c3df35708 100644
--- a/src/arch/x86/isa/insts/simd64/integer/data_transfer/move.py
+++ b/src/arch/x86/isa/insts/simd64/integer/data_transfer/move.py
@@ -50,7 +50,7 @@ def macroop MOVD_MMX_P {
 };
 
 def macroop MOVD_R_MMX {
-    mov2int reg, mmxm, size=dsz 
+    mov2int reg, mmxm, size=dsz
 };
 
 def macroop MOVD_M_MMX {
-- 
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