From aaa30714b3808a9283cda41bf29e167bf6b8edb0 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Mon, 12 Nov 2007 14:37:54 -0800 Subject: X86: Various fixes to indexing segmentation related registers --HG-- extra : convert_revision : 3d45da3a3fb38327582cfdfb72cfc4ce1b1d31af --- src/arch/x86/isa/microasm.isa | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/arch/x86/isa/microasm.isa') diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa index 0c43d4c13..e05582e37 100644 --- a/src/arch/x86/isa/microasm.isa +++ b/src/arch/x86/isa/microasm.isa @@ -108,7 +108,7 @@ let {{ # This segment selects an internal address space mapped to MSRs, # CPUID info, etc. - assembler.symbols["intseg"] = "NUM_SEGMENTREGS" + assembler.symbols["intseg"] = "SEGMENT_REG_INT" for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di'): assembler.symbols["r%s" % reg] = "INTREG_R%s" % reg.upper() -- cgit v1.2.3 From f1f5dd79bf8c2cf2ef64cc1432a4a0601d475e72 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Mon, 12 Nov 2007 14:38:59 -0800 Subject: X86: Implement the wrcr microop which writes a control register, and some control register work. --HG-- extra : convert_revision : 3e9daef9cdd0665c033420e5b4f981649e9908ab --- src/arch/x86/isa/microasm.isa | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/arch/x86/isa/microasm.isa') diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa index e05582e37..040bb2036 100644 --- a/src/arch/x86/isa/microasm.isa +++ b/src/arch/x86/isa/microasm.isa @@ -113,6 +113,9 @@ let {{ for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di'): assembler.symbols["r%s" % reg] = "INTREG_R%s" % reg.upper() + for reg in range(15): + assembler.symbols["cr%d" % reg] = "MISCREG_CR%d" % reg + for flag in ('CF', 'PF', 'ECF', 'AF', 'EZF', 'ZF', 'SF', 'OF'): assembler.symbols[flag] = flag + "Bit" -- cgit v1.2.3