From 6369df59c85870c0975bc881d7b7d612c9dcf15b Mon Sep 17 00:00:00 2001 From: Nilay Vaish Date: Tue, 11 Sep 2012 09:25:43 -0500 Subject: x86: Add a separate register for D flag bit The D flag bit is part of the cc flag bit register currently. But since it is not being used any where in the implementation, it creates an unnecessary dependency. Hence, it is being moved to a separate register. --- src/arch/x86/isa/microops/debug.isa | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/arch/x86/isa/microops/debug.isa') diff --git a/src/arch/x86/isa/microops/debug.isa b/src/arch/x86/isa/microops/debug.isa index 2d6af8356..b9da9c602 100644 --- a/src/arch/x86/isa/microops/debug.isa +++ b/src/arch/x86/isa/microops/debug.isa @@ -142,7 +142,7 @@ let {{ "func": func, "func_num": "GenericISA::M5DebugFault::%s" % func_num, "cond_test": "checkCondition(ccFlagBits | cfofBits | \ - ecfBit | ezfBit, cc)"}) + dfBit | ecfBit | ezfBit, cc)"}) exec_output += MicroDebugExecute.subst(iop) header_output += MicroDebugDeclare.subst(iop) decoder_output += MicroDebugConstructor.subst(iop) -- cgit v1.2.3