From efbff349a92ac8a8a994a67d1fda2ec103ec5225 Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Sun, 7 Oct 2007 18:16:00 -0700
Subject: X86: Significantly filled out misc regs.

--HG--
extra : convert_revision : 4c53be6568134d65e57f5411df986fd9a89e82c9
---
 src/arch/x86/isa/microops/regop.isa | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

(limited to 'src/arch/x86/isa/microops')

diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa
index de2e6692d..ab113a699 100644
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -482,13 +482,13 @@ let {{
     class Adc(FlagRegOp):
         code = '''
             CCFlagBits flags = ccFlagBits;
-            DestReg = merge(DestReg, psrc1 + op2 + flags.CF, dataSize);
+            DestReg = merge(DestReg, psrc1 + op2 + flags.cf, dataSize);
             '''
 
     class Sbb(SubRegOp):
         code = '''
             CCFlagBits flags = ccFlagBits;
-            DestReg = merge(DestReg, psrc1 - op2 - flags.CF, dataSize);
+            DestReg = merge(DestReg, psrc1 - op2 - flags.cf, dataSize);
             '''
 
     class And(LogicRegOp):
@@ -733,7 +733,7 @@ let {{
             if(shiftAmt)
             {
                 CCFlagBits flags = ccFlagBits;
-                uint64_t top = flags.CF << (dataSize * 8 - shiftAmt);
+                uint64_t top = flags.cf << (dataSize * 8 - shiftAmt);
                 if(shiftAmt > 1)
                     top |= psrc1 << (dataSize * 8 - shiftAmt - 1);
                 uint64_t bottom = bits(psrc1, dataSize * 8, shiftAmt);
@@ -804,7 +804,7 @@ let {{
             {
                 CCFlagBits flags = ccFlagBits;
                 uint64_t top = psrc1 << shiftAmt;
-                uint64_t bottom = flags.CF << (shiftAmt - 1);
+                uint64_t bottom = flags.cf << (shiftAmt - 1);
                 if(shiftAmt > 1)
                     bottom |=
                         bits(psrc1, dataSize * 8 - 1,
-- 
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