From 3f64b374c49491f18dc2ca538ed8c8597e4aac83 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 13 Dec 2017 01:03:00 -0800 Subject: x86: Use operand size 4 when it would be 2 for cmpxchg8b. This means the instruction is treated as cmpxchg8b when the effective operand size is 16 bits. Change-Id: I4d9bb295f96097e1746a9bbccb2c579d14738fab Reviewed-on: https://gem5-review.googlesource.com/6603 Reviewed-by: Jason Lowe-Power Maintainer: Gabe Black --- src/arch/x86/isa/insts/general_purpose/semaphores.py | 1 + src/arch/x86/isa/microasm.isa | 5 +++++ 2 files changed, 6 insertions(+) (limited to 'src/arch/x86/isa') diff --git a/src/arch/x86/isa/insts/general_purpose/semaphores.py b/src/arch/x86/isa/insts/general_purpose/semaphores.py index 9f751b3ae..bb46c42f2 100644 --- a/src/arch/x86/isa/insts/general_purpose/semaphores.py +++ b/src/arch/x86/isa/insts/general_purpose/semaphores.py @@ -132,6 +132,7 @@ def macroop XADD_R_R { # of dataSize. cmpxchg8bCode = ''' def macroop CMPXCHG8B_%(suffix)s { + .adjust_env clampOsz %(rdip)s lea t1, seg, %(sib)s, disp, dataSize=asz ldsplit%(l)s (t2, t3), seg, [1, t0, t1], disp=0 diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa index 3ceaf9b28..2ee27502c 100644 --- a/src/arch/x86/isa/microasm.isa +++ b/src/arch/x86/isa/microasm.isa @@ -180,6 +180,11 @@ let {{ env.dataSize = 4; ''' + assembler.symbols["clampOsz"] = ''' + if (env.dataSize == 2) + env.dataSize = 4; + ''' + def trimImm(width): return "adjustedImm = adjustedImm & mask(%s);" % width -- cgit v1.2.3