From 8b66b56b12664211e76fc1bc880f1a13cb88bc06 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Mon, 29 Jan 2018 17:49:07 -0800 Subject: x86: Add bitfields which can gather/scatter bases and limits. Add bitfields which can gather/scatter base and limit fields within "normal" segment descriptors, and in TSS descriptors which have the same bitfields in the same positions for those two values. This centralizes the code which manages those bitfields and makes it less likely that a local implementation will be buggy. Change-Id: I9809aa626fc31388595c3d3b225c25a0ec6a1275 Reviewed-on: https://gem5-review.googlesource.com/7661 Reviewed-by: Gabe Black Maintainer: Gabe Black --- src/arch/x86/isa/microops/regop.isa | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) (limited to 'src/arch/x86/isa') diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa index 2d5ae048a..08a4ddd41 100644 --- a/src/arch/x86/isa/microops/regop.isa +++ b/src/arch/x86/isa/microops/regop.isa @@ -1627,8 +1627,7 @@ let {{ case LDT64: case AvailableTSS64: case BusyTSS64: - replaceBits(target, 23, 0, desc.baseLow); - replaceBits(target, 31, 24, desc.baseHigh); + replaceBits(target, 31, 0, desc.base); break; case CallGate64: case IntGate64: @@ -1703,12 +1702,8 @@ let {{ attr.writable = desc.type.w; } } - Addr base = desc.baseLow | (desc.baseHigh << 24); - Addr limit = desc.limitLow | (desc.limitHigh << 16); - if (desc.g) - limit = (limit << 12) | mask(12); - SegBaseDest = base; - SegLimitDest = limit; + SegBaseDest = desc.base; + SegLimitDest = desc.limit; SegAttrDest = attr; } else { SegBaseDest = SegBaseDest; -- cgit v1.2.3