From 54a9d471faab2b4ab3ef26932957b2e0d496e84e Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Fri, 22 Dec 2017 16:14:03 -0800 Subject: arch,mem: Move page table construction into the arch classes. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This gets rid of an awkward NoArchPageTable class, and also gives the arch a place to inject ISA specific parameters (specifically page size) without having to have TheISA:: in the generic version of these types. Change-Id: I1412f303460d5c43dafdb9b3cd07af81c908a441 Reviewed-on: https://gem5-review.googlesource.com/6981 Reviewed-by: Alexandru Duțu Maintainer: Gabe Black --- src/arch/x86/process.hh | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'src/arch/x86/process.hh') diff --git a/src/arch/x86/process.hh b/src/arch/x86/process.hh index 3eb9620c9..e5e18570d 100644 --- a/src/arch/x86/process.hh +++ b/src/arch/x86/process.hh @@ -59,6 +59,14 @@ namespace X86ISA class X86Process : public Process { protected: + /** + * Declaration of architectural page table for x86. + * + * These page tables are stored in system memory and respect x86 + * specification. + */ + typedef MultiLevelPageTable ArchPageTable; + Addr _gdtStart; Addr _gdtSize; @@ -189,14 +197,6 @@ namespace X86ISA Process *process, TheISA::IntReg flags) override; }; - /** - * Declaration of architectural page table for x86. - * - * These page tables are stored in system memory and respect x86 - * specification. - */ - typedef MultiLevelPageTable ArchPageTable; - } #endif // __ARCH_X86_PROCESS_HH__ -- cgit v1.2.3