From 1c2800465480993040e3058ef94ce30efbe982ec Mon Sep 17 00:00:00 2001
From: Steve Reinhardt <steve.reinhardt@amd.com>
Date: Sat, 1 Aug 2009 22:50:13 -0700
Subject: Clean up some inconsistencies with Request flags.

---
 src/arch/x86/tlb.cc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'src/arch/x86/tlb.cc')

diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc
index 418f6ffb2..5280b9ba8 100644
--- a/src/arch/x86/tlb.cc
+++ b/src/arch/x86/tlb.cc
@@ -197,7 +197,7 @@ TLB::translateInt(RequestPtr req, ThreadContext *tc)
         panic("CPUID memory space not yet implemented!\n");
     } else if (prefix == IntAddrPrefixMSR) {
         vaddr = vaddr >> 3;
-        req->setMmapedIpr(true);
+        req->setFlags(Request::MMAPED_IPR);
         Addr regNum = 0;
         switch (vaddr & ~IntAddrPrefixMask) {
           case 0x10:
@@ -526,7 +526,7 @@ TLB::translateInt(RequestPtr req, ThreadContext *tc)
         // space.
         assert(!(IOPort & ~0xFFFF));
         if (IOPort == 0xCF8 && req->getSize() == 4) {
-            req->setMmapedIpr(true);
+            req->setFlags(Request::MMAPED_IPR);
             req->setPaddr(MISCREG_PCI_CONFIG_ADDRESS * sizeof(MiscReg));
         } else if ((IOPort & ~mask(2)) == 0xCFC) {
             Addr configAddress =
-- 
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