From aade13769fc6c666bb855e0745e042c82f9941d6 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Sat, 2 Jul 2011 22:34:29 -0700 Subject: ISA: Use readBytes/writeBytes for all instruction level memory operations. --- src/arch/x86/insts/microldstop.hh | 67 ------------------- src/arch/x86/isa/includes.isa | 1 + src/arch/x86/isa/microops/ldstop.isa | 12 ++-- src/arch/x86/memhelpers.hh | 120 +++++++++++++++++++++++++++++++++++ 4 files changed, 128 insertions(+), 72 deletions(-) create mode 100644 src/arch/x86/memhelpers.hh (limited to 'src/arch/x86') diff --git a/src/arch/x86/insts/microldstop.hh b/src/arch/x86/insts/microldstop.hh index 5487655e2..c618bc128 100644 --- a/src/arch/x86/insts/microldstop.hh +++ b/src/arch/x86/insts/microldstop.hh @@ -97,73 +97,6 @@ namespace X86ISA std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; - - template - Fault read(Context *xc, Addr EA, MemType & Mem, unsigned flags) const - { - Fault fault = NoFault; - switch(dataSize) - { - case 1: - fault = xc->read(EA, (uint8_t&)Mem, flags); - break; - case 2: - fault = xc->read(EA, (uint16_t&)Mem, flags); - break; - case 4: - fault = xc->read(EA, (uint32_t&)Mem, flags); - break; - case 8: - fault = xc->read(EA, (uint64_t&)Mem, flags); - break; - default: - panic("Bad operand size %d for read at %#x.\n", dataSize, EA); - } - return fault; - } - - template - Fault write(Context *xc, MemType & Mem, Addr EA, unsigned flags) const - { - Fault fault = NoFault; - switch(dataSize) - { - case 1: - fault = xc->write((uint8_t&)Mem, EA, flags, 0); - break; - case 2: - fault = xc->write((uint16_t&)Mem, EA, flags, 0); - break; - case 4: - fault = xc->write((uint32_t&)Mem, EA, flags, 0); - break; - case 8: - fault = xc->write((uint64_t&)Mem, EA, flags, 0); - break; - default: - panic("Bad operand size %d for write at %#x.\n", dataSize, EA); - } - return fault; - } - - uint64_t - get(PacketPtr pkt) const - { - switch(dataSize) - { - case 1: - return pkt->get(); - case 2: - return pkt->get(); - case 4: - return pkt->get(); - case 8: - return pkt->get(); - default: - panic("Bad operand size %d for read at %#x.\n", - dataSize, pkt->getAddr()); - } - } }; } diff --git a/src/arch/x86/isa/includes.isa b/src/arch/x86/isa/includes.isa index 8d4af6829..dc8abbc66 100644 --- a/src/arch/x86/isa/includes.isa +++ b/src/arch/x86/isa/includes.isa @@ -112,6 +112,7 @@ output exec {{ #include "arch/x86/regs/misc.hh" #include "arch/x86/cpuid.hh" #include "arch/x86/faults.hh" +#include "arch/x86/memhelpers.hh" #include "arch/x86/tlb.hh" #include "base/bigint.hh" #include "base/compiler.hh" diff --git a/src/arch/x86/isa/microops/ldstop.isa b/src/arch/x86/isa/microops/ldstop.isa index f7a38b486..c88161f34 100644 --- a/src/arch/x86/isa/microops/ldstop.isa +++ b/src/arch/x86/isa/microops/ldstop.isa @@ -98,7 +98,7 @@ def template MicroLoadExecute {{ %(ea_code)s; DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); - fault = read(xc, EA, Mem, memFlags); + fault = readMemAtomic(xc, traceData, EA, Mem, dataSize, memFlags); if (fault == NoFault) { %(code)s; @@ -127,7 +127,7 @@ def template MicroLoadInitiateAcc {{ %(ea_code)s; DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); - fault = read(xc, EA, Mem, memFlags); + fault = readMemTiming(xc, traceData, EA, Mem, dataSize, memFlags); return fault; } @@ -143,7 +143,7 @@ def template MicroLoadCompleteAcc {{ %(op_decl)s; %(op_rd)s; - Mem = get(pkt); + Mem = getMem(pkt, dataSize, traceData); %(code)s; @@ -174,7 +174,8 @@ def template MicroStoreExecute {{ if(fault == NoFault) { - fault = write(xc, Mem, EA, memFlags); + fault = writeMemAtomic(xc, traceData, Mem, dataSize, EA, + memFlags, NULL); if(fault == NoFault) { %(op_wb)s; @@ -201,7 +202,8 @@ def template MicroStoreInitiateAcc {{ if(fault == NoFault) { - fault = write(xc, Mem, EA, memFlags); + fault = writeMemTiming(xc, traceData, Mem, dataSize, EA, + memFlags, NULL); } return fault; } diff --git a/src/arch/x86/memhelpers.hh b/src/arch/x86/memhelpers.hh new file mode 100644 index 000000000..9dd54b937 --- /dev/null +++ b/src/arch/x86/memhelpers.hh @@ -0,0 +1,120 @@ +/* + * Copyright (c) 2011 Google + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Gabe Black + */ + +#ifndef __ARCH_X86_MEMHELPERS_HH__ +#define __ARCH_X86_MEMHELPERS_HH__ + +#include "base/types.hh" +#include "sim/byteswap.hh" +#include "sim/fault_fwd.hh" +#include "sim/insttracer.hh" + +namespace X86ISA +{ + +template +Fault +readMemTiming(XC *xc, Trace::InstRecord *traceData, Addr addr, + uint64_t &mem, unsigned dataSize, unsigned flags) +{ + return xc->readBytes(addr, (uint8_t *)&mem, dataSize, flags); +} + +static inline uint64_t +getMem(PacketPtr pkt, unsigned dataSize, Trace::InstRecord *traceData) +{ + uint64_t mem; + switch (dataSize) { + case 1: + mem = pkt->get(); + break; + case 2: + mem = pkt->get(); + break; + case 4: + mem = pkt->get(); + break; + case 8: + mem = pkt->get(); + break; + default: + panic("Unhandled size in getMem.\n"); + } + if (traceData) + traceData->setData(mem); + return mem; +} + +template +Fault +readMemAtomic(XC *xc, Trace::InstRecord *traceData, Addr addr, uint64_t &mem, + unsigned dataSize, unsigned flags) +{ + memset(&mem, 0, sizeof(mem)); + Fault fault = readMemTiming(xc, traceData, addr, mem, dataSize, flags); + if (fault == NoFault) { + // If LE to LE, this is a nop, if LE to BE, the actual data ends up + // in the right place because the LSBs where at the low addresses on + // access. This doesn't work for BE guests. + mem = gtoh(mem); + if (traceData) + traceData->setData(mem); + } + return fault; +} + +template +Fault +writeMemTiming(XC *xc, Trace::InstRecord *traceData, uint64_t mem, + unsigned dataSize, Addr addr, unsigned flags, uint64_t *res) +{ + if (traceData) { + traceData->setData(mem); + } + mem = TheISA::htog(mem); + return xc->writeBytes((uint8_t *)&mem, dataSize, addr, flags, res); +} + +template +Fault +writeMemAtomic(XC *xc, Trace::InstRecord *traceData, uint64_t mem, + unsigned dataSize, Addr addr, unsigned flags, uint64_t *res) +{ + Fault fault = writeMemTiming(xc, traceData, mem, dataSize, addr, flags, + res); + if (fault == NoFault && res != NULL) { + *res = gtoh(*res); + } + return fault; +} + +} + +#endif -- cgit v1.2.3