From 25ec278a0be5e3e09d396ef5be993e45b766790b Mon Sep 17 00:00:00 2001
From: Nilay Vaish <nilay@cs.wisc.edu>
Date: Sat, 12 Jan 2013 22:09:48 -0600
Subject: x86: Changes to decoder, corrects 9376 The changes made by the
 changeset 9376 were not quite correct. The patch made changes to the code
 which resulted in decoder not getting initialized correctly when the state
 was restored from a checkpoint.

This patch adds a startup function to each ISA object. For x86, this function
sets the required state in the decoder. For other ISAs, the function is empty
right now.
---
 src/arch/alpha/isa.hh | 2 ++
 src/arch/arm/isa.hh   | 2 ++
 src/arch/mips/isa.hh  | 2 ++
 src/arch/power/isa.hh | 2 ++
 src/arch/sparc/isa.hh | 2 ++
 src/arch/x86/isa.cc   | 6 ++++++
 src/arch/x86/isa.hh   | 1 +
 7 files changed, 17 insertions(+)

(limited to 'src/arch')

diff --git a/src/arch/alpha/isa.hh b/src/arch/alpha/isa.hh
index 739b77286..1832f0222 100644
--- a/src/arch/alpha/isa.hh
+++ b/src/arch/alpha/isa.hh
@@ -106,6 +106,8 @@ namespace AlphaISA
         const Params *params() const;
 
         ISA(Params *p);
+
+        void startup(ThreadContext *tc) {}
     };
 }
 
diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh
index f5fe5f834..12ecc4921 100644
--- a/src/arch/arm/isa.hh
+++ b/src/arch/arm/isa.hh
@@ -193,6 +193,8 @@ namespace ArmISA
             updateRegMap(tmp_cpsr);
         }
 
+        void startup(ThreadContext *tc) {}
+
         typedef ArmISAParams Params;
 
         const Params *params() const;
diff --git a/src/arch/mips/isa.hh b/src/arch/mips/isa.hh
index 2169c0de0..5ae779a6c 100644
--- a/src/arch/mips/isa.hh
+++ b/src/arch/mips/isa.hh
@@ -157,6 +157,8 @@ namespace MipsISA
         static std::string miscRegNames[NumMiscRegs];
 
       public:
+        void startup(ThreadContext *tc) {}
+
         const Params *params() const;
 
         ISA(Params *p);
diff --git a/src/arch/power/isa.hh b/src/arch/power/isa.hh
index a989d33a7..f4e053d85 100644
--- a/src/arch/power/isa.hh
+++ b/src/arch/power/isa.hh
@@ -98,6 +98,8 @@ class ISA : public SimObject
         return reg;
     }
 
+    void startup(ThreadContext *tc) {}
+
     const Params *params() const;
 
     ISA(Params *p);
diff --git a/src/arch/sparc/isa.hh b/src/arch/sparc/isa.hh
index 3dd9f6109..dac8a2095 100644
--- a/src/arch/sparc/isa.hh
+++ b/src/arch/sparc/isa.hh
@@ -171,6 +171,8 @@ class ISA : public SimObject
 
     void unserialize(Checkpoint *cp, const std::string & section);
 
+    void startup(ThreadContext *tc) {}
+
   protected:
 
     bool isHyperPriv() { return hpstate.hpriv; }
diff --git a/src/arch/x86/isa.cc b/src/arch/x86/isa.cc
index 381dc5999..f65bc2392 100644
--- a/src/arch/x86/isa.cc
+++ b/src/arch/x86/isa.cc
@@ -387,6 +387,12 @@ ISA::unserialize(Checkpoint * cp, const std::string & section)
                      NULL);
 }
 
+void
+ISA::startup(ThreadContext *tc)
+{
+    tc->getDecoderPtr()->setM5Reg(regVal[MISCREG_M5_REG]);
+}
+
 }
 
 X86ISA::ISA *
diff --git a/src/arch/x86/isa.hh b/src/arch/x86/isa.hh
index 7c5330ca3..e87d747bc 100644
--- a/src/arch/x86/isa.hh
+++ b/src/arch/x86/isa.hh
@@ -87,6 +87,7 @@ namespace X86ISA
 
         void serialize(std::ostream &os);
         void unserialize(Checkpoint *cp, const std::string &section);
+        void startup(ThreadContext *tc);
     };
 }
 
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