From 41fc8a573ea61b2463606a0714a9e563494da329 Mon Sep 17 00:00:00 2001
From: Andreas Hansson <andreas.hansson@arm.com>
Date: Fri, 19 Sep 2014 10:35:18 -0400
Subject: arch: Pass faults by const reference where possible

This patch changes how faults are passed between methods in an attempt
to copy as few reference-counting pointer instances as possible. This
should avoid unecessary copies being created, contributing to the
increment/decrement of the reference counters.
---
 src/arch/arm/stage2_lookup.cc | 2 +-
 src/arch/arm/stage2_lookup.hh | 2 +-
 src/arch/arm/stage2_mmu.cc    | 4 ++--
 src/arch/arm/stage2_mmu.hh    | 2 +-
 4 files changed, 5 insertions(+), 5 deletions(-)

(limited to 'src/arch')

diff --git a/src/arch/arm/stage2_lookup.cc b/src/arch/arm/stage2_lookup.cc
index 1299ade68..59cacd527 100755
--- a/src/arch/arm/stage2_lookup.cc
+++ b/src/arch/arm/stage2_lookup.cc
@@ -171,7 +171,7 @@ Stage2LookUp::mergeTe(RequestPtr req, BaseTLB::Mode mode)
 }
 
 void
-Stage2LookUp::finish(Fault _fault, RequestPtr req,
+Stage2LookUp::finish(const Fault &_fault, RequestPtr req,
     ThreadContext *tc, BaseTLB::Mode mode)
 {
     fault = _fault;
diff --git a/src/arch/arm/stage2_lookup.hh b/src/arch/arm/stage2_lookup.hh
index 3a1228f46..657392ea9 100755
--- a/src/arch/arm/stage2_lookup.hh
+++ b/src/arch/arm/stage2_lookup.hh
@@ -97,7 +97,7 @@ class Stage2LookUp : public BaseTLB::Translation
 
     void markDelayed() {}
 
-    void finish(Fault fault, RequestPtr req, ThreadContext *tc,
+    void finish(const Fault &fault, RequestPtr req, ThreadContext *tc,
                 BaseTLB::Mode mode);
 };
 
diff --git a/src/arch/arm/stage2_mmu.cc b/src/arch/arm/stage2_mmu.cc
index 01451548c..98eeedb78 100755
--- a/src/arch/arm/stage2_mmu.cc
+++ b/src/arch/arm/stage2_mmu.cc
@@ -114,8 +114,8 @@ Stage2MMU::Stage2Translation::Stage2Translation(Stage2MMU &_parent,
 }
 
 void
-Stage2MMU::Stage2Translation::finish(Fault _fault, RequestPtr req, ThreadContext *tc,
-    BaseTLB::Mode mode)
+Stage2MMU::Stage2Translation::finish(const Fault &_fault, RequestPtr req,
+                                     ThreadContext *tc, BaseTLB::Mode mode)
 {
     fault = _fault;
 
diff --git a/src/arch/arm/stage2_mmu.hh b/src/arch/arm/stage2_mmu.hh
index d1812c4ed..37eca4f56 100755
--- a/src/arch/arm/stage2_mmu.hh
+++ b/src/arch/arm/stage2_mmu.hh
@@ -78,7 +78,7 @@ class Stage2MMU : public SimObject
         markDelayed() {}
 
         void
-        finish(Fault fault, RequestPtr req, ThreadContext *tc,
+        finish(const Fault &fault, RequestPtr req, ThreadContext *tc,
                BaseTLB::Mode mode);
 
         void setVirt(Addr vaddr, int size, Request::Flags flags, int masterId)
-- 
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