From 6dddca951151c953fdab6f3e57b9385150d8b90b Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Sun, 29 Oct 2006 01:58:37 -0500 Subject: Add an integer microcode register. --HG-- extra : convert_revision : f23dbfdfe44e8e6cdd6948000669ad4f743b9fb4 --- src/arch/sparc/intregfile.cc | 19 ++++++++++++++++--- src/arch/sparc/intregfile.hh | 1 + src/arch/sparc/isa/operands.isa | 1 + src/arch/sparc/isa_traits.hh | 8 ++++++-- 4 files changed, 24 insertions(+), 5 deletions(-) (limited to 'src/arch') diff --git a/src/arch/sparc/intregfile.cc b/src/arch/sparc/intregfile.cc index bef62f6ae..164f194dd 100644 --- a/src/arch/sparc/intregfile.cc +++ b/src/arch/sparc/intregfile.cc @@ -75,8 +75,14 @@ IntRegFile::IntRegFile() IntReg IntRegFile::readReg(int intReg) { - IntReg val = - regView[intReg >> FrameOffsetBits][intReg & FrameOffsetMask]; + IntReg val; + if(intReg < NumRegularIntRegs) + val = regView[intReg >> FrameOffsetBits][intReg & FrameOffsetMask]; + else if((intReg -= NumRegularIntRegs) < NumMicroIntRegs) + val = microRegs[intReg]; + else + panic("Tried to read non-existant integer register\n"); + DPRINTF(Sparc, "Read register %d = 0x%x\n", intReg, val); return val; } @@ -86,7 +92,12 @@ Fault IntRegFile::setReg(int intReg, const IntReg &val) if(intReg) { DPRINTF(Sparc, "Wrote register %d = 0x%x\n", intReg, val); - regView[intReg >> FrameOffsetBits][intReg & FrameOffsetMask] = val; + if(intReg < NumRegularIntRegs) + regView[intReg >> FrameOffsetBits][intReg & FrameOffsetMask] = val; + else if((intReg -= NumRegularIntRegs) < NumMicroIntRegs) + microRegs[intReg] = val; + else + panic("Tried to set non-existant integer register\n"); } return NoFault; } @@ -123,6 +134,7 @@ void IntRegFile::serialize(std::ostream &os) SERIALIZE_ARRAY(regGlobals[x], RegsPerFrame); for(x = 0; x < 2 * NWindows; x++) SERIALIZE_ARRAY(regSegments[x], RegsPerFrame); + SERIALIZE_ARRAY(microRegs, NumMicroIntRegs); } void IntRegFile::unserialize(Checkpoint *cp, const std::string §ion) @@ -132,4 +144,5 @@ void IntRegFile::unserialize(Checkpoint *cp, const std::string §ion) UNSERIALIZE_ARRAY(regGlobals[x], RegsPerFrame); for(unsigned int x = 0; x < 2 * NWindows; x++) UNSERIALIZE_ARRAY(regSegments[x], RegsPerFrame); + UNSERIALIZE_ARRAY(microRegs, NumMicroIntRegs); } diff --git a/src/arch/sparc/intregfile.hh b/src/arch/sparc/intregfile.hh index d305c753b..223e3b34c 100644 --- a/src/arch/sparc/intregfile.hh +++ b/src/arch/sparc/intregfile.hh @@ -65,6 +65,7 @@ namespace SparcISA IntReg regGlobals[MaxGL][RegsPerFrame]; IntReg regSegments[2 * NWindows][RegsPerFrame]; + IntReg microRegs[NumMicroIntRegs]; enum regFrame {Globals, Outputs, Locals, Inputs, NumFrames}; diff --git a/src/arch/sparc/isa/operands.isa b/src/arch/sparc/isa/operands.isa index ba2c38e91..80b499b91 100644 --- a/src/arch/sparc/isa/operands.isa +++ b/src/arch/sparc/isa/operands.isa @@ -61,6 +61,7 @@ def operands {{ 'RdHigh': ('IntReg', 'udw', 'RD | 1', 'IsInteger', 3), 'Rs1': ('IntReg', 'udw', 'RS1', 'IsInteger', 4), 'Rs2': ('IntReg', 'udw', 'RS2', 'IsInteger', 5), + 'uReg0': ('IntReg', 'udw', 'NumRegularIntRegs+0', 'IsInteger', 6), 'Frds': ('FloatReg', 'sf', 'RD', 'IsFloating', 10), 'Frd': ('FloatReg', 'df', 'dfpr(RD)', 'IsFloating', 10), # Each Frd_N refers to the Nth double precision register from Frd. diff --git a/src/arch/sparc/isa_traits.hh b/src/arch/sparc/isa_traits.hh index fb09121a3..46a0ebbfb 100644 --- a/src/arch/sparc/isa_traits.hh +++ b/src/arch/sparc/isa_traits.hh @@ -57,13 +57,17 @@ namespace SparcISA //This makes sure the big endian versions of certain functions are used. using namespace BigEndianGuest; - // SPARC have a delay slot + // SPARC has a delay slot #define ISA_HAS_DELAY_SLOT 1 // SPARC NOP (sethi %(hi(0), g0) const MachInst NoopMachInst = 0x01000000; - const int NumIntRegs = 32; + const int NumRegularIntRegs = 32; + const int NumMicroIntRegs = 1; + const int NumIntRegs = + NumRegularIntRegs + + NumMicroIntRegs; const int NumFloatRegs = 64; const int NumMiscRegs = 40; -- cgit v1.2.3