From 72d35701e9842a454ea0bd1e4546d161c3024f93 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Tue, 1 Mar 2011 22:42:18 -0800 Subject: X86: Mark prefetches as such in their instruction and request flags. --- src/arch/x86/isa/microops/ldstop.isa | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'src/arch') diff --git a/src/arch/x86/isa/microops/ldstop.isa b/src/arch/x86/isa/microops/ldstop.isa index cd649d644..86c2dccf7 100644 --- a/src/arch/x86/isa/microops/ldstop.isa +++ b/src/arch/x86/isa/microops/ldstop.isa @@ -282,8 +282,10 @@ let {{ self.memFlags = baseFlags if atCPL0: self.memFlags += " | (CPL0FlagBit << FlagShift)" + self.instFlags = "" if prefetch: self.memFlags += " | Request::PREFETCH" + self.instFlags += " | StaticInst::IsDataPrefetch" self.memFlags += " | (machInst.legacy.addr ? " + \ "(AddrSizeFlagBit << FlagShift) : 0)" @@ -293,7 +295,7 @@ let {{ %(disp)s, %(segment)s, %(data)s, %(dataSize)s, %(addressSize)s, %(memFlags)s)''' % { "class_name" : self.className, - "flags" : self.microFlagsText(microFlags), + "flags" : self.microFlagsText(microFlags) + self.instFlags, "scale" : self.scale, "index" : self.index, "base" : self.base, "disp" : self.disp, -- cgit v1.2.3