From b43eeaf2e22ef081e2bc73bff7a069bbf5eb5fda Mon Sep 17 00:00:00 2001 From: Korey Sewell Date: Sun, 19 Jun 2011 21:43:33 -0400 Subject: cpus/isa: add a != operator for pcstate --- src/arch/arm/types.hh | 6 ++++++ src/arch/generic/types.hh | 24 ++++++++++++++++++++++++ 2 files changed, 30 insertions(+) (limited to 'src/arch') diff --git a/src/arch/arm/types.hh b/src/arch/arm/types.hh index 9e7c0ff7f..15f9f4d0a 100644 --- a/src/arch/arm/types.hh +++ b/src/arch/arm/types.hh @@ -433,6 +433,12 @@ namespace ArmISA _itstate == opc._itstate && _nextItstate == opc._nextItstate; } + bool + operator != (const PCState &opc) const + { + return !(*this == opc); + } + void serialize(std::ostream &os) { diff --git a/src/arch/generic/types.hh b/src/arch/generic/types.hh index 931349ac4..050fbd56e 100644 --- a/src/arch/generic/types.hh +++ b/src/arch/generic/types.hh @@ -98,6 +98,12 @@ class PCStateBase return _pc == opc._pc && _npc == opc._npc; } + bool + operator != (const PCStateBase &opc) const + { + return !(*this == opc); + } + void serialize(std::ostream &os) { @@ -235,6 +241,12 @@ class UPCState : public SimplePCState _upc == opc._upc && _nupc == opc._nupc; } + bool + operator != (const UPCState &opc) const + { + return !(*this == opc); + } + void serialize(std::ostream &os) { @@ -310,6 +322,12 @@ class DelaySlotPCState : public SimplePCState _nnpc == opc._nnpc; } + bool + operator != (const DelaySlotPCState &opc) const + { + return !(*this == opc); + } + void serialize(std::ostream &os) { @@ -401,6 +419,12 @@ class DelaySlotUPCState : public DelaySlotPCState _upc == opc._upc && _nupc == opc._nupc; } + bool + operator != (const DelaySlotUPCState &opc) const + { + return !(*this == opc); + } + void serialize(std::ostream &os) { -- cgit v1.2.3