From e67749426054d8ddb7f11b53a89741d4808f3acb Mon Sep 17 00:00:00 2001
From: Gabor Dozsa <gabor.dozsa@arm.com>
Date: Thu, 7 Jan 2016 16:33:47 -0600
Subject: pseudo inst,util: Add optional key to initparam pseudo instruction

The key parameter can be used to read out various config parameters from
within the simulated software.
---
 src/arch/alpha/isa/decoder.isa                | 2 +-
 src/arch/arm/isa/insts/m5ops.isa              | 5 +++--
 src/arch/x86/isa/decoder/two_byte_opcodes.isa | 2 +-
 3 files changed, 5 insertions(+), 4 deletions(-)

(limited to 'src/arch')

diff --git a/src/arch/alpha/isa/decoder.isa b/src/arch/alpha/isa/decoder.isa
index e61bb43ff..a114afaea 100644
--- a/src/arch/alpha/isa/decoder.isa
+++ b/src/arch/alpha/isa/decoder.isa
@@ -982,7 +982,7 @@ decode OPCODE default Unknown::unknown() {
                 PseudoInst::loadsymbol(xc->tcBase());
             }}, No_OpClass, IsNonSpeculative);
             0x30: initparam({{
-                Ra = PseudoInst::initParam(xc->tcBase());
+                Ra = PseudoInst::initParam(xc->tcBase(), R16, R17);
             }});
             0x40: resetstats({{
                 PseudoInst::resetstats(xc->tcBase(), R16, R17);
diff --git a/src/arch/arm/isa/insts/m5ops.isa b/src/arch/arm/isa/insts/m5ops.isa
index e18d0682c..efe88c73a 100644
--- a/src/arch/arm/isa/insts/m5ops.isa
+++ b/src/arch/arm/isa/insts/m5ops.isa
@@ -276,13 +276,14 @@ let {{
     exec_output += PredOpExecute.subst(loadsymbolIop)
 
     initparamCode = '''
-    uint64_t ip_val  = PseudoInst::initParam(xc->tcBase());
+    uint64_t ip_val = PseudoInst::initParam(xc->tcBase(), join32to64(R1, R0),
+                                            join32to64(R3, R2));
     R0 = bits(ip_val, 31, 0);
     R1 = bits(ip_val, 63, 32);
     '''
 
     initparamCode64 = '''
-    X0 = PseudoInst::initParam(xc->tcBase());
+    X0 = PseudoInst::initParam(xc->tcBase(), X0, X1);
     '''
 
     initparamIop = InstObjParams("initparam", "Initparam", "PredOp",
diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
index 4a21e2900..01e8e9b0c 100644
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
@@ -173,7 +173,7 @@
                         PseudoInst::m5fail(xc->tcBase(), Rdi, Rsi);
                     }}, IsNonSpeculative);
                     0x30: m5initparam({{
-                        Rax = PseudoInst::initParam(xc->tcBase());
+                        Rax = PseudoInst::initParam(xc->tcBase(), Rdi, Rsi);
                     }}, IsNonSpeculative);
                     0x31: m5loadsymbol({{
                         PseudoInst::loadsymbol(xc->tcBase());
-- 
cgit v1.2.3