From ee7055c289c5a5181f425ad0851fb12d9e236146 Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Thu, 23 Apr 2009 01:43:00 -0700
Subject: X86: Put the StoreCheck flag with the others, and don't collide with
 other flags.

---
 src/arch/x86/insts/microldstop.hh    | 3 ++-
 src/arch/x86/isa/microops/ldstop.isa | 4 ++--
 src/arch/x86/tlb.cc                  | 2 +-
 src/arch/x86/tlb.hh                  | 2 --
 4 files changed, 5 insertions(+), 6 deletions(-)

(limited to 'src/arch')

diff --git a/src/arch/x86/insts/microldstop.hh b/src/arch/x86/insts/microldstop.hh
index 1774454c3..ec9cb52b3 100644
--- a/src/arch/x86/insts/microldstop.hh
+++ b/src/arch/x86/insts/microldstop.hh
@@ -68,7 +68,8 @@ namespace X86ISA
     static const int FlagShift = 4;
     enum FlagBit {
         CPL0FlagBit = 1,
-        AddrSizeFlagBit = 2
+        AddrSizeFlagBit = 2,
+        StoreCheck = 4
     };
 
     /**
diff --git a/src/arch/x86/isa/microops/ldstop.isa b/src/arch/x86/isa/microops/ldstop.isa
index f16a3b488..c4c57a954 100644
--- a/src/arch/x86/isa/microops/ldstop.isa
+++ b/src/arch/x86/isa/microops/ldstop.isa
@@ -439,9 +439,9 @@ let {{
 
     defineMicroLoadOp('Ld', 'Data = merge(Data, Mem, dataSize);')
     defineMicroLoadOp('Ldst', 'Data = merge(Data, Mem, dataSize);',
-            'X86ISA::StoreCheck')
+            '(StoreCheck << FlagShift)')
     defineMicroLoadOp('Ldstl', 'Data = merge(Data, Mem, dataSize);',
-            'X86ISA::StoreCheck | Request::LOCKED')
+            '(StoreCheck << FlagShift) | Request::LOCKED')
     defineMicroLoadOp('Ldfp', 'FpData.uqw = Mem;')
 
     def defineMicroStoreOp(mnemonic, code, \
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc
index 9b4a397ee..f8b5c3392 100644
--- a/src/arch/x86/tlb.cc
+++ b/src/arch/x86/tlb.cc
@@ -193,7 +193,7 @@ TLB::translate(RequestPtr req, ThreadContext *tc, Translation *translation,
     Addr vaddr = req->getVaddr();
     DPRINTF(TLB, "Translating vaddr %#x.\n", vaddr);
     uint32_t flags = req->getFlags();
-    bool storeCheck = flags & StoreCheck;
+    bool storeCheck = flags & (StoreCheck << FlagShift);
 
     int seg = flags & SegmentFlagMask;
 
diff --git a/src/arch/x86/tlb.hh b/src/arch/x86/tlb.hh
index a9d3a4fa6..f55c26435 100644
--- a/src/arch/x86/tlb.hh
+++ b/src/arch/x86/tlb.hh
@@ -79,8 +79,6 @@ namespace X86ISA
 {
     class Walker;
 
-    static const unsigned StoreCheck = 1 << NUM_SEGMENTREGS;
-
     class TLB : public BaseTLB
     {
       protected:
-- 
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