From 29e5df890d9512a6a2c726dcb4ee46b92ac4cb22 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 28 Feb 2007 16:36:38 +0000 Subject: Make trap instructions always generate TrapInstruction Fault objects which call into the Process object to handle system calls. Refactored the Process objects, and move the handler code into it's own file, and add some syscalls which are used in a natively compiled hello world. Software traps with trap number 3 (not syscall number 3) are supposed to cause the register windows to be flushed but are ignored right now. Finally, made uname for SPARC report a 2.6.12 kernel which is what m22-018.pool happens to be running. --HG-- extra : convert_revision : ea873f01c62234c0542f310cc143c6a7c76ade94 --- src/base/loader/elf_object.cc | 9 +++++++-- src/base/loader/object_file.hh | 3 ++- 2 files changed, 9 insertions(+), 3 deletions(-) (limited to 'src/base') diff --git a/src/base/loader/elf_object.cc b/src/base/loader/elf_object.cc index d59affe85..b56dc5aa6 100644 --- a/src/base/loader/elf_object.cc +++ b/src/base/loader/elf_object.cc @@ -78,9 +78,14 @@ ElfObject::tryFile(const string &fname, int fd, size_t len, uint8_t *data) //just assume if it wasn't something else and it's 64 bit, that's //what it must be. if (ehdr.e_machine == EM_SPARC64 || - ehdr.e_machine == EM_SPARC || + (ehdr.e_machine == EM_SPARC && + ehdr.e_ident[EI_CLASS] == ELFCLASS64)|| ehdr.e_machine == EM_SPARCV9) { - arch = ObjectFile::SPARC; + arch = ObjectFile::SPARC64; + } else if (ehdr.e_machine == EM_SPARC32PLUS || + (ehdr.e_machine == EM_SPARC && + ehdr.e_ident[EI_CLASS] == ELFCLASS32)) { + arch = ObjectFile::SPARC32; } else if (ehdr.e_machine == EM_MIPS && ehdr.e_ident[EI_CLASS] == ELFCLASS32) { arch = ObjectFile::Mips; diff --git a/src/base/loader/object_file.hh b/src/base/loader/object_file.hh index 18e6482be..49c7363e6 100644 --- a/src/base/loader/object_file.hh +++ b/src/base/loader/object_file.hh @@ -47,7 +47,8 @@ class ObjectFile enum Arch { UnknownArch, Alpha, - SPARC, + SPARC64, + SPARC32, Mips }; -- cgit v1.2.3 From 4e8d2d1593475008b926829e6944a59963166079 Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Fri, 2 Mar 2007 22:34:51 -0500 Subject: make ldtw(a) -- Twin 32 bit load work correctly -- by doing it the same way as the twin 64 bit loads src/arch/isa_parser.py: src/arch/sparc/isa/decoder.isa: src/arch/sparc/isa/operands.isa: src/base/bigint.hh: src/cpu/simple/atomic.cc: src/cpu/simple/timing.cc: src/mem/packet_access.hh: make ldtw(a) Twin 32 bit load work correctly --HG-- extra : convert_revision : 2646b269d58cc1774e896065875a56cf5e313b42 --- src/base/bigint.hh | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'src/base') diff --git a/src/base/bigint.hh b/src/base/bigint.hh index aa60eeb04..d533e662a 100644 --- a/src/base/bigint.hh +++ b/src/base/bigint.hh @@ -42,9 +42,22 @@ struct m5_twin64_t { } }; +struct m5_twin32_t { + uint32_t a; + uint32_t b; + inline m5_twin32_t& operator=(const uint32_t x) + { + a = x; + b = x; + return *this; + } +}; + + // This is for twin loads (two 64 bit values), not 1 128 bit value (as far as // endian conversion is concerned! typedef m5_twin64_t Twin64_t; +typedef m5_twin32_t Twin32_t; #endif // __BASE_BIGINT_HH__ -- cgit v1.2.3